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authorRabin Vincent <rabin.vincent@stericsson.com>2010-12-08 11:07:57 +0530
committerLinus Walleij <linus.walleij@stericsson.com>2011-01-10 18:34:52 +0100
commit92389ca8362c42952c7ebb8a0350ac522dcde0f4 (patch)
tree6c840e0d706712729bded5900aed93fa70778ca2 /arch/arm/mach-ux500/cpu.c
parent0c21e3aaf6ae85bee804a325aa29c325209180fd (diff)
ux500: remove build-time changing macros
To allow the possiblity of building U8500 and U5500 support in the same image. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> [Rebased to latest changes in Russells tree] Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Diffstat (limited to 'arch/arm/mach-ux500/cpu.c')
-rw-r--r--arch/arm/mach-ux500/cpu.c74
1 files changed, 39 insertions, 35 deletions
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index 5730409c0f7d..35a3af13fb30 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -23,37 +23,29 @@
#include "clock.h"
-static struct map_desc ux500_io_desc[] __initdata = {
- __IO_DEV_DESC(UX500_UART0_BASE, SZ_4K),
- __IO_DEV_DESC(UX500_UART2_BASE, SZ_4K),
-
- __IO_DEV_DESC(UX500_GIC_CPU_BASE, SZ_4K),
- __IO_DEV_DESC(UX500_GIC_DIST_BASE, SZ_4K),
- __IO_DEV_DESC(UX500_L2CC_BASE, SZ_4K),
- __IO_DEV_DESC(UX500_TWD_BASE, SZ_4K),
- __IO_DEV_DESC(UX500_SCU_BASE, SZ_4K),
-
- __IO_DEV_DESC(UX500_CLKRST1_BASE, SZ_4K),
- __IO_DEV_DESC(UX500_CLKRST2_BASE, SZ_4K),
- __IO_DEV_DESC(UX500_CLKRST3_BASE, SZ_4K),
- __IO_DEV_DESC(UX500_CLKRST5_BASE, SZ_4K),
- __IO_DEV_DESC(UX500_CLKRST6_BASE, SZ_4K),
-
- __IO_DEV_DESC(UX500_MTU0_BASE, SZ_4K),
- __IO_DEV_DESC(UX500_MTU1_BASE, SZ_4K),
-
- __IO_DEV_DESC(UX500_BACKUPRAM0_BASE, SZ_8K),
-};
+#ifdef CONFIG_CACHE_L2X0
+static void __iomem *l2x0_base;
+#endif
void __init ux500_map_io(void)
{
- iotable_init(ux500_io_desc, ARRAY_SIZE(ux500_io_desc));
}
void __init ux500_init_irq(void)
{
- gic_init(0, 29, __io_address(UX500_GIC_DIST_BASE),
- __io_address(UX500_GIC_CPU_BASE));
+ void __iomem *dist_base;
+ void __iomem *cpu_base;
+
+ if (cpu_is_u5500()) {
+ dist_base = __io_address(U5500_GIC_DIST_BASE);
+ cpu_base = __io_address(U5500_GIC_CPU_BASE);
+ } else if (cpu_is_u8500()) {
+ dist_base = __io_address(U8500_GIC_DIST_BASE);
+ cpu_base = __io_address(U8500_GIC_CPU_BASE);
+ } else
+ ux500_unknown_soc();
+
+ gic_init(0, 29, dist_base, cpu_base);
/*
* Init clocks here so that they are available for system timer
@@ -74,7 +66,8 @@ static inline void ux500_cache_wait(void __iomem *reg, unsigned long mask)
static inline void ux500_cache_sync(void)
{
- void __iomem *base = __io_address(UX500_L2CC_BASE);
+ void __iomem *base = l2x0_base;
+
writel_relaxed(0, base + L2X0_CACHE_SYNC);
ux500_cache_wait(base + L2X0_CACHE_SYNC, 1);
}
@@ -96,20 +89,23 @@ static void ux500_l2x0_disable(void)
*/
static void ux500_l2x0_inv_all(void)
{
- void __iomem *l2x0_base = __io_address(UX500_L2CC_BASE);
+ void __iomem *base = l2x0_base;
uint32_t l2x0_way_mask = (1<<16) - 1; /* Bitmask of active ways */
/* invalidate all ways */
- writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
- ux500_cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);
+ writel_relaxed(l2x0_way_mask, base + L2X0_INV_WAY);
+ ux500_cache_wait(base + L2X0_INV_WAY, l2x0_way_mask);
ux500_cache_sync();
}
static int ux500_l2x0_init(void)
{
- void __iomem *l2x0_base;
-
- l2x0_base = __io_address(UX500_L2CC_BASE);
+ if (cpu_is_u5500())
+ l2x0_base = __io_address(U5500_L2CC_BASE);
+ else if (cpu_is_u8500())
+ l2x0_base = __io_address(U8500_L2CC_BASE);
+ else
+ ux500_unknown_soc();
/* 64KB way size, 8 way associativity, force WA */
l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
@@ -127,13 +123,21 @@ static void __init ux500_timer_init(void)
{
#ifdef CONFIG_LOCAL_TIMERS
/* Setup the local timer base */
- twd_base = __io_address(UX500_TWD_BASE);
+ if (cpu_is_u5500())
+ twd_base = __io_address(U5500_TWD_BASE);
+ else if (cpu_is_u8500())
+ twd_base = __io_address(U8500_TWD_BASE);
+ else
+ ux500_unknown_soc();
#endif
- /* Setup the MTU base */
- if (cpu_is_u8500ed())
+ if (cpu_is_u5500())
+ mtu_base = __io_address(U5500_MTU0_BASE);
+ else if (cpu_is_u8500ed())
mtu_base = __io_address(U8500_MTU0_BASE_ED);
+ else if (cpu_is_u8500())
+ mtu_base = __io_address(U8500_MTU0_BASE);
else
- mtu_base = __io_address(UX500_MTU0_BASE);
+ ux500_unknown_soc();
nmdk_timer_init();
}