diff options
| author | Gary King <gking@nvidia.com> | 2010-10-12 18:10:31 -0700 |
|---|---|---|
| committer | Colin Cross <ccross@android.com> | 2011-05-23 18:22:59 -0700 |
| commit | f07df2b59f560b216e2a9482f0c10c1115313126 (patch) | |
| tree | cc748a3a1a46d78e7ae95c0b1b8ef5a6e353e665 /arch/arm/mm/Kconfig | |
| parent | 9cbe52de3d4bc0c1b299c9db0d12a6388477f474 (diff) | |
Revert "[ARM] mm: add page allocator for modifying cache attributes"
This reverts commit 54d414570432ce07fa1a14b657f53bed752e3d7e.
Change-Id: I8e5cf6ef3555129da9741ef52a1e6a3a772ad588
Signed-off-by: Gary King <gking@nvidia.com>
Diffstat (limited to 'arch/arm/mm/Kconfig')
| -rw-r--r-- | arch/arm/mm/Kconfig | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 9b45f9fc97ba..0074b8dba793 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -863,29 +863,6 @@ config ARM_L1_CACHE_SHIFT default 6 if ARM_L1_CACHE_SHIFT_6 default 5 -config ARM_ATTRIB_ALLOCATOR - bool "Support custom cache attribute allocations in low memory" - select ARCH_LOWMEM_IN_PTES if (CPU_V7) - depends on MMU && !CPU_CACHE_VIVT - help - Historically, the kernel has only reserved a small region - of physical memory for uncached access, and relied on - explicit cache maintenance for ensuring coherency between - the CPU and DMA. - - However, many recent systems support mapping discontiguous - physical pages into contiguous DMA addresses (so-called - system MMUs). For some DMA clients (notably graphics and - multimedia engines), performing explict cache maintenance - between CPU and DMA mappings can be prohibitively expensive, - and since ARMv7, mapping the same physical page with different - cache attributes is disallowed and has unpredictable behavior. - - Say 'Y' here to include page allocation support with explicit - cache attributes; on ARMv7 systems this will also force the - kernel's page tables to be mapped using page tables rather - than sections. - config ARM_DMA_MEM_BUFFERABLE bool "Use non-cacheable memory for DMA" if (CPU_V6 || CPU_V6K) && !CPU_V7 depends on !(MACH_REALVIEW_PB1176 || REALVIEW_EB_ARM11MP || \ |