diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2012-02-23 12:00:12 -0800 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-03-01 13:05:08 -0800 |
| commit | 956ec5a5820c42842027a40bd17fa696295407c8 (patch) | |
| tree | c04870bb16f48c1be50d91ba99d4e7b934db3fa9 /arch/arm/mm | |
| parent | 2091ac4c57bd18dfe35eb3f61b81aed1445d4d19 (diff) | |
ARM: mm: Make CPU debug context save/restore optional
Change-Id: I5a5a26c6fc0a169a004307e07de1223c107e4df7
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/86158
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Gerrit_Virtual_Submit
Diffstat (limited to 'arch/arm/mm')
| -rw-r--r-- | arch/arm/mm/Kconfig | 7 | ||||
| -rw-r--r-- | arch/arm/mm/proc-v7.S | 25 |
2 files changed, 25 insertions, 7 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 88633fe01a5d..10fcfc71725e 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -890,3 +890,10 @@ config ARCH_HAS_BARRIERS help This option allows the use of custom mandatory barriers included via the mach/barriers.h file. + +config ARM_SAVE_DEBUG_CONTEXT + bool "Save CPU debug state across suspend/resume" + depends on PM_SLEEP && CPU_V7 + help + This option enables save/restore of the ARM debug registers + across CPU powerdown. diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 9b1ee813994b..983d6069812d 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -218,13 +218,15 @@ ENDPROC(cpu_v7_set_pte_ext) .equ NMRR, 0xc0e044e0 /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */ -.globl cpu_v7_suspend_size -.equ cpu_v7_suspend_size, (4 * (10 + 4 + (16 * 2) + (16 * 2))) -/* 10 CP15 registers - * 4 CP14 registers - * 16x2 CP14 breakpoint registers (maximum) - * 16x2 CP14 watchpoint registers (maximum) +.local cpu_v7_debug_suspend_size +#ifdef CONFIG_ARM_SAVE_DEBUG_CONTEXT +/* + * Debug context: + * 4 CP14 registers + * 16x2 CP14 breakpoint registers (maximum) + * 16x2 CP14 watchpoint registers (maximum) */ +.equ cpu_v7_debug_suspend_size, (4 * (4 + (16 * 2) + (16 * 2))) .macro save_brkpt cm mrc p14, 0, r4, c0, \cm, 4 @@ -250,6 +252,12 @@ ENDPROC(cpu_v7_set_pte_ext) mcr p14, 0, r5, c0, \cm, 7 .endm +#else +.equ cpu_v7_debug_suspend_size, 0 +#endif + +.globl cpu_v7_suspend_size +.equ cpu_v7_suspend_size, (4 * 10) + cpu_v7_debug_suspend_size #ifdef CONFIG_PM_SLEEP ENTRY(cpu_v7_do_suspend) stmfd sp!, {r0, r3 - r11, lr} @@ -266,6 +274,7 @@ ENTRY(cpu_v7_do_suspend) mrc p15, 0, r11, c1, c0, 2 @ Co-processor access control stmia r0!, {r6 - r11} +#ifdef CONFIG_ARM_SAVE_DEBUG_CONTEXT /* Save CP14 debug controller context */ mrc p14, 0, r4, c0, c1, 0 @ DSCR mrc p14, 0, r5, c0, c6, 0 @ WFAR @@ -328,7 +337,7 @@ ENTRY(cpu_v7_do_suspend) save_wpt c2 save_wpt c1 save_wpt c0 - +#endif ldmfd sp!, {r0, r3 - r11, pc} ENDPROC(cpu_v7_do_suspend) @@ -358,6 +367,7 @@ ENTRY(cpu_v7_do_resume) mcr p15, 0, r5, c10, c2, 1 @ write NMRR isb +#ifdef CONFIG_ARM_SAVE_DEBUG_CONTEXT /* Restore CP14 debug controller context */ ldmia r0!, {r2 - r5} @@ -425,6 +435,7 @@ start_restore_wpt: mcr p14, 0, r2, c0, c2, 2 @ DSCR isb +#endif dsb mov r0, r9 @ control register mov r2, r7, lsr #14 @ get TTB0 base |