diff options
author | Sang-Hun Lee <sanlee@nvidia.com> | 2012-04-16 10:54:34 -0700 |
---|---|---|
committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2012-04-19 07:41:01 -0700 |
commit | 31e7504b0fd04f47befbd27a767fad785260e4a2 (patch) | |
tree | 4dcf200a36a887fae16b3f91e279cee0bc7890d9 /arch/arm/mm | |
parent | df448cf33a7683bbddc69fcf5b6f3196e50f2bc8 (diff) |
Revert "ARM: pm: no need to save/restore context ID register"
This reverts commit 16e0bb8c46656b1d902d422e0065c746af161a1c.
Bug 967887
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Change-Id: Ifa115c4030c48cbd0b629cf02899ca8c6f25d314
Reviewed-on: http://git-master/r/96792
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'arch/arm/mm')
-rw-r--r-- | arch/arm/mm/proc-v6.S | 33 | ||||
-rw-r--r-- | arch/arm/mm/proc-v7.S | 17 |
2 files changed, 26 insertions, 24 deletions
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index d061d2fa5506..2e27b467c6a6 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -128,18 +128,19 @@ ENTRY(cpu_v6_set_pte_ext) /* Suspend/resume support: taken from arch/arm/mach-s3c64xx/sleep.S */ .globl cpu_v6_suspend_size -.equ cpu_v6_suspend_size, 4 * 6 +.equ cpu_v6_suspend_size, 4 * 7 #ifdef CONFIG_PM_SLEEP ENTRY(cpu_v6_do_suspend) - stmfd sp!, {r4 - r9, lr} + stmfd sp!, {r4 - r10, lr} mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID - mrc p15, 0, r5, c3, c0, 0 @ Domain ID - mrc p15, 0, r6, c2, c0, 1 @ Translation table base 1 - mrc p15, 0, r7, c1, c0, 1 @ auxiliary control register - mrc p15, 0, r8, c1, c0, 2 @ co-processor access control - mrc p15, 0, r9, c1, c0, 0 @ control register - stmia r0, {r4 - r9} - ldmfd sp!, {r4- r9, pc} + mrc p15, 0, r5, c13, c0, 1 @ Context ID + mrc p15, 0, r6, c3, c0, 0 @ Domain ID + mrc p15, 0, r7, c2, c0, 1 @ Translation table base 1 + mrc p15, 0, r8, c1, c0, 1 @ auxiliary control register + mrc p15, 0, r9, c1, c0, 2 @ co-processor access control + mrc p15, 0, r10, c1, c0, 0 @ control register + stmia r0, {r4 - r10} + ldmfd sp!, {r4- r10, pc} ENDPROC(cpu_v6_do_suspend) ENTRY(cpu_v6_do_resume) @@ -148,19 +149,19 @@ ENTRY(cpu_v6_do_resume) mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache mcr p15, 0, ip, c7, c15, 0 @ clean+invalidate cache mcr p15, 0, ip, c7, c10, 4 @ drain write buffer - mcr p15, 0, ip, c13, c0, 1 @ set reserved context ID - ldmia r0, {r4 - r9} + ldmia r0, {r4 - r10} mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID - mcr p15, 0, r5, c3, c0, 0 @ Domain ID + mcr p15, 0, r5, c13, c0, 1 @ Context ID + mcr p15, 0, r6, c3, c0, 0 @ Domain ID ALT_SMP(orr r1, r1, #TTB_FLAGS_SMP) ALT_UP(orr r1, r1, #TTB_FLAGS_UP) mcr p15, 0, r1, c2, c0, 0 @ Translation table base 0 - mcr p15, 0, r6, c2, c0, 1 @ Translation table base 1 - mcr p15, 0, r7, c1, c0, 1 @ auxiliary control register - mcr p15, 0, r8, c1, c0, 2 @ co-processor access control + mcr p15, 0, r7, c2, c0, 1 @ Translation table base 1 + mcr p15, 0, r8, c1, c0, 1 @ auxiliary control register + mcr p15, 0, r9, c1, c0, 2 @ co-processor access control mcr p15, 0, ip, c2, c0, 2 @ TTB control register mcr p15, 0, ip, c7, c5, 4 @ ISB - mov r0, r9 @ control register + mov r0, r10 @ control register b cpu_resume_mmu ENDPROC(cpu_v6_do_resume) #endif diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index bd0f3a18ab41..b29fa5c7a5ee 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -263,8 +263,9 @@ ENTRY(cpu_v7_do_suspend) stmfd sp!, {r0, r3 - r10, lr} mrc p15, 0, r3, c15, c0, 1 @ diag mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID - mrc p15, 0, r5, c13, c0, 3 @ User r/o thread ID - stmia r0!, {r3 - r5} + mrc p15, 0, r5, c13, c0, 1 @ Context ID + mrc p15, 0, r6, c13, c0, 3 @ User r/o thread ID + stmia r0!, {r3 - r6} mrc p15, 0, r6, c3, c0, 0 @ Domain ID mrc p15, 0, r7, c2, c0, 1 @ TTB 1 mrc p15, 0, r8, c1, c0, 0 @ Control register @@ -356,13 +357,13 @@ ENTRY(cpu_v7_do_resume) mov ip, #0 mcr p15, 0, ip, c8, c7, 0 @ invalidate TLBs mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache - mcr p15, 0, ip, c13, c0, 1 @ set reserved context ID - ldmia r0!, {r3 - r5} + ldmia r0!, {r3 - r6} #ifndef CONFIG_TRUSTED_FOUNDATIONS mcr p15, 0, r3, c15, c0, 1 @ diag #endif mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID - mcr p15, 0, r5, c13, c0, 3 @ User r/o thread ID + mcr p15, 0, r5, c13, c0, 1 @ Context ID + mcr p15, 0, r6, c13, c0, 3 @ User r/o thread ID ldmia r0!, {r6 - r10} mcr p15, 0, r6, c3, c0, 0 @ Domain ID ALT_SMP(orr r1, r1, #TTB_FLAGS_SMP) @@ -399,8 +400,8 @@ ENTRY(cpu_v7_do_resume) ldrne r4, [r0], #4 mcrne p14, 0, r4, c0, c0, 2 @ DBGDTRRXext - mrc p14, 0, r6, c0, c0, 0 @ read IDR - mov r3, r6, lsr #24 + mrc p14, 0, r4, c0, c0, 0 @ read IDR + mov r3, r4, lsr #24 and r3, r3, #0xf @ r3 has the number of brkpt rsb r3, r3, #0xf @@ -429,7 +430,7 @@ ENTRY(cpu_v7_do_resume) restore_brkpt c1 restore_brkpt c0 - mov r3, r6, lsr #28 @ r3 has the number of wpt + mov r3, r4, lsr #28 @ r3 has the number of wpt rsb r3, r3, #0xf /* r3 = (15 - #of wpt) ; |