diff options
| author | Ranjani Vaidyanathan <ra5478@freescale.com> | 2010-08-31 12:52:24 -0500 |
|---|---|---|
| committer | Alan Tull <r80115@freescale.com> | 2010-09-25 09:52:08 -0500 |
| commit | 30f6fc381026ad024d019bf5f41762863fdb9d64 (patch) | |
| tree | a76fd25be51b9e6892550c3c74ea4736201ac0bd /arch/arm/plat-mxc/clock.c | |
| parent | 10cc0d293ce91254b2f96f335dee950e7b204180 (diff) | |
ENGR00126863: MX50: Add LPAPM support
Add support for Low Power Audio Playback Mode. System will enter this mode
whenever no modules that need high bus frequencies are active. The LP domain
and DDR will run at 24Mhz and CPU is at 160MHz in LPAPM mode.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Diffstat (limited to 'arch/arm/plat-mxc/clock.c')
| -rw-r--r-- | arch/arm/plat-mxc/clock.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c index 8f1ec2866d66..f29a32052434 100644 --- a/arch/arm/plat-mxc/clock.c +++ b/arch/arm/plat-mxc/clock.c @@ -4,7 +4,7 @@ * Copyright (C) 2004 - 2005 Nokia corporation * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com> - * Copyright 2007-2010 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2007-2010 Freescale Semiconductor, Inc. * Copyright 2008 Juergen Beisert, kernel@pengutronix.de * * This program is free software; you can redistribute it and/or @@ -174,14 +174,8 @@ int clk_enable(struct clk *clk) if (clk == NULL || IS_ERR(clk)) return -EINVAL; - spin_lock_irqsave(&clockfw_lock, flags); - - ret = __clk_enable(clk); - - spin_unlock_irqrestore(&clockfw_lock, flags); - if ((clk->flags & CPU_FREQ_TRIG_UPDATE) - && (clk_get_usecount(clk) == 1)) { + && (clk_get_usecount(clk) == 0)) { #if (defined(CONFIG_ARCH_MX5) || defined(CONFIG_ARCH_MX37)) if (low_freq_bus_used() && !low_bus_freq_mode) set_low_bus_freq(); @@ -201,6 +195,13 @@ int clk_enable(struct clk *clk) #endif } + + spin_lock_irqsave(&clockfw_lock, flags); + + ret = __clk_enable(clk); + + spin_unlock_irqrestore(&clockfw_lock, flags); + return ret; } EXPORT_SYMBOL(clk_enable); @@ -229,12 +230,12 @@ void clk_disable(struct clk *clk) set_low_bus_freq(); else { if (!high_bus_freq_mode) { - /* Currently at ow or medium set point, + /* Currently at low or medium set point, * need to set to high setpoint */ set_high_bus_freq(0); } else if (high_bus_freq_mode || low_bus_freq_mode) { - /* Currently at ow or high set point, + /* Currently at low or high set point, * need to set to medium setpoint */ set_high_bus_freq(0); |