diff options
| author | Alison Wang <b18965@freescale.com> | 2012-09-28 13:19:09 +0800 |
|---|---|---|
| committer | Andy Voltz <andy.voltz@timesys.com> | 2012-10-17 14:37:24 -0400 |
| commit | b7354b3953a041d7b0a09f9fbb1d99448c01b3c5 (patch) | |
| tree | 40b0063645ab02520c058b0b2e3cebea5670ed89 /arch/arm/plat-mxc/include/mach/iomux-mvf.h | |
| parent | 32788800d684c30297e35a99fbe69e36476f7464 (diff) | |
ENGR00181390-1: qspi: Add platform support for Quad SPI driver
Add platform support for Quad SPI driver.
Signed-off-by: Alison Wang <b18965@freescale.com>
Xiaochun Li <b41219@freescale.com>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/iomux-mvf.h')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mvf.h | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mvf.h b/arch/arm/plat-mxc/include/mach/iomux-mvf.h index ea661abc0126..309a8ca8e621 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mvf.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mvf.h @@ -310,4 +310,77 @@ typedef enum iomux_config { IOMUX_PAD(0x0054, 0x0054, 0, 0x0000, 0, \ MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE) +/*QSPI*/ +#define MVF600_PAD79_PTD0_QSPI0_A_SCK \ + IOMUX_PAD(0x013C, 0x013c, 1, 0x0000, 0, \ + PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_SLOW | \ + PAD_CTL_DSE_150ohm | PAD_CTL_PUS_22K_UP | \ + PAD_CTL_PKE | PAD_CTL_OBE_IBE_ENABLE) + +#define MVF600_PAD80_PTD1_QSPI0_A_CS0 \ + IOMUX_PAD(0x0140, 0x0140, 1, 0x0000, 0, \ + PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_SLOW | \ + PAD_CTL_DSE_150ohm | PAD_CTL_PUS_22K_UP | \ + PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_OBE_IBE_ENABLE) + +#define MVF600_PAD81_PTD2_QSPI0_A_D3 \ + IOMUX_PAD(0x0144, 0x0144, 1, 0x0000, 0, \ + PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_SLOW | \ + PAD_CTL_DSE_150ohm | PAD_CTL_PUS_22K_UP | \ + PAD_CTL_OBE_IBE_ENABLE) + +#define MVF600_PAD82_PTD3_QSPI0_A_D2 \ + IOMUX_PAD(0x0148, 0x0148, 1, 0x0000, 0, \ + PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_SLOW | \ + PAD_CTL_DSE_150ohm | PAD_CTL_PUS_22K_UP | \ + PAD_CTL_OBE_IBE_ENABLE) + +#define MVF600_PAD83_PTD4_QSPI0_A_D1 \ + IOMUX_PAD(0x014C, 0x014c, 1, 0x0000, 0, \ + PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_SLOW | \ + PAD_CTL_DSE_150ohm | PAD_CTL_PUS_22K_UP | \ + PAD_CTL_OBE_IBE_ENABLE) + +#define MVF600_PAD84_PTD5_QSPI0_A_D0 \ + IOMUX_PAD(0x0150, 0x0150, 1, 0x0000, 0, \ + PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_SLOW | \ + PAD_CTL_DSE_150ohm | PAD_CTL_PUS_22K_UP | \ + PAD_CTL_PKE | PAD_CTL_OBE_IBE_ENABLE) + +#define MVF600_PAD86_PTD7_QSPI0_B_SCK \ + IOMUX_PAD(0x0158, 0x0158, 1, 0x0000, 0, \ + PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_SLOW | \ + PAD_CTL_DSE_150ohm | PAD_CTL_PUS_22K_UP | \ + PAD_CTL_PKE | PAD_CTL_OBE_IBE_ENABLE) + +#define MVF600_PAD87_PTD8_QSPI0_B_CS0 \ + IOMUX_PAD(0x015C, 0x015c, 1, 0x0000, 0, \ + PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_SLOW | \ + PAD_CTL_DSE_150ohm | PAD_CTL_PUS_22K_UP | \ + PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_OBE_IBE_ENABLE) + +#define MVF600_PAD88_PTD9_QSPI0_B_D3 \ + IOMUX_PAD(0x0160, 0x0160, 1, 0x0000, 0, \ + PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_SLOW | \ + PAD_CTL_DSE_150ohm | PAD_CTL_PUS_22K_UP | \ + PAD_CTL_OBE_IBE_ENABLE) + +#define MVF600_PAD89_PTD10_QSPI0_B_D2 \ + IOMUX_PAD(0x0164, 0x0164, 1, 0x0000, 0, \ + PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_SLOW | \ + PAD_CTL_DSE_150ohm | PAD_CTL_PUS_22K_UP | \ + PAD_CTL_OBE_IBE_ENABLE) + +#define MVF600_PAD90_PTD11_QSPI0_B_D1 \ + IOMUX_PAD(0x0168, 0x0168, 1, 0x0000, 0, \ + PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_SLOW | \ + PAD_CTL_DSE_150ohm | PAD_CTL_PUS_22K_UP | \ + PAD_CTL_OBE_IBE_ENABLE) + +#define MVF600_PAD91_PTD12_QSPI0_B_D0 \ + IOMUX_PAD(0x016C, 0x016c, 1, 0x0000, 0, \ + PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_SLOW | \ + PAD_CTL_DSE_150ohm | PAD_CTL_PUS_22K_UP | \ + PAD_CTL_PKE | PAD_CTL_OBE_IBE_ENABLE) + #endif |