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authorAmit Kucheria <amit.kucheria@canonical.com>2009-12-03 22:36:41 +0200
committerAmit Kucheria <amit.kucheria@canonical.com>2010-02-09 16:15:26 +0200
commita003708ad4ee9384226251431c7953a24079ff80 (patch)
tree03062bf18e6d688338c46015682f80aba7d458db /arch/arm/plat-mxc/include/mach/irqs.h
parentcb2dc111b156eb41f61ed4e5b3a3a5df90526d9d (diff)
mxc: TrustZone interrupt controller (TZIC) for Freescale i.MX5 family
Freescale i.MX51 processor uses a new interrupt controller. Add driver for TrustZone Interrupt Controller Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/irqs.h')
-rw-r--r--arch/arm/plat-mxc/include/mach/irqs.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
index 0cb347645db4..38f150162e45 100644
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ b/arch/arm/plat-mxc/include/mach/irqs.h
@@ -12,9 +12,13 @@
#define __ASM_ARCH_MXC_IRQS_H__
/*
- * So far all i.MX SoCs have 64 internal interrupts
+ * SoCs with TZIC interrupt controller have 128 IRQs, those with AVIC have 64
*/
+#ifdef CONFIG_MXC_TZIC
+#define MXC_INTERNAL_IRQS 128
+#else
#define MXC_INTERNAL_IRQS 64
+#endif
#define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS