diff options
| author | Richard Zhu <r65037@freescale.com> | 2013-02-01 12:31:21 +0800 |
|---|---|---|
| committer | Richard Zhu <r65037@freescale.com> | 2013-02-05 14:34:21 +0800 |
| commit | c1e3dbbcf7a886d2c5c6f1ccb184659a9fa6c832 (patch) | |
| tree | 03c42c076652d394dd912b860dab8b01cebf430b /arch/arm/plat-mxc/include/mach/irqs.h | |
| parent | f7b0df52be5dbdd2f3940b8be3276f91bae1432d (diff) | |
ENGR00243106 imx: pcie: enable pcie msi on imx6 platforms
deprieved from boundary msi support patch
add the following modifications
* use the RC's line address 0x01FF8000 instead of one
actual physical memory as the msi start address.
The physical memory address is not mandatory required by the
msi start address.
* set PCI_MSI_FLAGS_ENABLE in RC's msi capability
structure when the msi int is enabled.
* the data of msg is only 16bit, set the upper 8bit
cputype, and the msi int num to the lower 8bit.
Signed-off-by: Richard Zhu <r65037@freescale.com>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/irqs.h')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/irqs.h | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index 9e44eaa4824c..62282a95550f 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h @@ -1,5 +1,5 @@ /* - * Copyright 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2004-2013 Freescale Semiconductor, Inc. All Rights Reserved. */ /* @@ -72,7 +72,14 @@ #define MX5_IPU_IRQS 0 #endif -#define NR_IRQS (MXC_IPU_IRQ_START + MX3_IPU_IRQS + MX5_IPU_IRQS) +#ifdef CONFIG_ARCH_MX6 +#define MX6_MSI_IRQS 128 +#else +#define MX6_MSI_IRQS 0 +#endif + +#define IRQ_IMX_MSI_0 (MXC_IPU_IRQ_START + MX3_IPU_IRQS + MX5_IPU_IRQS) +#define NR_IRQS (IRQ_IMX_MSI_0 + MX6_MSI_IRQS) extern int imx_irq_set_priority(unsigned char irq, unsigned char prio); |