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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-10-25 15:44:25 +0200
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-11-17 08:58:11 +0100
commita99631489bbd1b4647b82d0822b6a3942e2dd731 (patch)
tree9af7ee56eea709ae48587ca5409e768fbf68917a /arch/arm/plat-mxc/include/mach/mx25.h
parentcf3a6aba2f8402d4e45f7f263a0e69f779cd1bdc (diff)
ARM: imx: change static io mapping to use a function
Now only the virtual addresses [0xf4000000, 0xf5ffffff] are used for static per-SoC mappings. The few mappings of whole chip selects are moved accordingly. The now wrong defines for virtual base addresses are removed. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mx25.h')
-rw-r--r--arch/arm/plat-mxc/include/mach/mx25.h13
1 files changed, 4 insertions, 9 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 08b5a3af9432..aac6a9c2b306 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -2,13 +2,11 @@
#define __MACH_MX25_H__
#define MX25_AIPS1_BASE_ADDR 0x43f00000
-#define MX25_AIPS1_BASE_ADDR_VIRT 0xfc000000
+#define MX25_AIPS1_BASE_ADDR_VIRT 0xf5300000
#define MX25_AIPS1_SIZE SZ_1M
#define MX25_AIPS2_BASE_ADDR 0x53f00000
-#define MX25_AIPS2_BASE_ADDR_VIRT 0xfc200000
#define MX25_AIPS2_SIZE SZ_1M
#define MX25_AVIC_BASE_ADDR 0x68000000
-#define MX25_AVIC_BASE_ADDR_VIRT 0xfc400000
#define MX25_AVIC_SIZE SZ_1M
#define MX25_I2C1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x80000)
@@ -27,12 +25,6 @@
#define MX25_GPIO2_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xd0000)
#define MX25_WDOG_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xdc000)
-#define MX25_IO_P2V(x) ( \
- IMX_IO_P2V_MODULE(x, MX25_AIPS1) ?: \
- IMX_IO_P2V_MODULE(x, MX25_AIPS2) ?: \
- IMX_IO_P2V_MODULE(x, MX25_AVIC))
-#define MX25_IO_ADDRESS(x) IOMEM(MX25_IO_P2V(x))
-
#define MX25_AIPS1_IO_ADDRESS(x) \
(((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT)
@@ -58,6 +50,9 @@
#define MX25_OTG_BASE_ADDR 0x53ff4000
#define MX25_CSI_BASE_ADDR 0x53ff8000
+#define MX25_IO_P2V(x) IMX_IO_P2V(x)
+#define MX25_IO_ADDRESS(x) IOMEM(MX25_IO_P2V(x))
+
#define MX25_INT_CSPI3 0
#define MX25_INT_I2C1 3
#define MX25_INT_I2C2 4