diff options
| author | Albert Chen <R65187@freescale.com> | 2009-10-09 16:44:20 +0800 |
|---|---|---|
| committer | Alejandro Gonzalez <alex.gonzalez@digi.com> | 2010-02-12 17:19:19 +0100 |
| commit | 6bed85a30de198de8eb9f463dcd7ffa9dcfb5280 (patch) | |
| tree | e87da1f8f8aa8549a1c66cc6b3d9c014126a5bce /arch/arm/plat-mxc/include/mach | |
| parent | 7769409953e7c0b402a28463d6cc5b9d4cbac456 (diff) | |
ENGR00115875 add USB gadget low power mode feature.
USB will enter low power mode if no vbus power supply.
Only finished this feature in Mx37.
1. When enter low power mode, driver will close usb related clocks
as possible as could.
set usb IP to stop.
Set PHY to low power suspend by setting PHCD bit of portsc.
2. This patch doesn't support low power mode in OTG mode yet.
Signed-off-by: Albert Chen <r65187@freescale.com>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/arc_otg.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/arc_otg.h b/arch/arm/plat-mxc/include/mach/arc_otg.h index 2d58f2e6d6fd..467ab1379e62 100644 --- a/arch/arm/plat-mxc/include/mach/arc_otg.h +++ b/arch/arm/plat-mxc/include/mach/arc_otg.h @@ -261,6 +261,8 @@ #define UCTRL_H2PP (1 << 18) /* Power Polarity for uh2 */ #define UCTRL_H2PM (1 << 16) /* HOST2 power mask */ #endif +#define UCTRL_H2OVBWK_EN (1 << 6) /* OTG VBUS Wakeup Enable */ +#define UCTRL_H2OIDWK_EN (1 << 5) /* OTG ID Wakeup Enable */ #define UCTRL_H1WIR (1 << 15) /* HOST1 wakeup intr request received */ #define UCTRL_H1SIC_MASK (3 << 13) /* HOST1 Serial Interface Config: */ @@ -272,6 +274,13 @@ #define UCTRL_H2LOCKD (1 << 12) /* HOST2 lock disable */ #define UCTRL_H1UIE (1 << 12) /* Host1 ULPI interrupt enable */ +#if defined(CONFIG_ARCH_MX37) +/* VBUS wakeup enable, UTMI only */ +#define UCTRL_VBUS_WKUP_EN (1 << 12) +#elif defined(CONFIG_ARCH_MX25) || defined(CONFIG_ARCH_MX35) +#define UCTRL_VBUS_WKUP_EN (1 << 15) +#endif + #define UCTRL_PP (1 << 11) /* power polarity bit */ #define UCTRL_H1WIE (1 << 11) /* HOST1 wakeup intr enable */ #define UCTRL_H1BPVAL_RXDP (1 << 10) /* HOST1 RxDp status in bypass mode */ @@ -309,6 +318,9 @@ /* 0=low : Operate as A-device */ /* USB_PHY_CTRL_FUNC */ +/* PHY control0 Register Bit Masks */ +#define USB_UTMI_PHYCTRL_CONF2 (1 << 26) + #define USB_UTMI_PHYCTRL_UTMI_ENABLE (1 << 24) #define USB_UTMI_PHYCTRL_CHGRDETEN (1 << 24) /* Enable Charger Detector */ #define USB_UTMI_PHYCTRL_CHGRDETON (1 << 23) /* Charger Detector Power On Control */ @@ -340,4 +352,6 @@ #define ULPIVW_WDATA_SHIFT 0 #define HCSPARAMS_PPC (0x1<<4) /* Port Power Control */ + +extern enum fsl_usb2_modes get_usb_mode(struct fsl_usb2_platform_data *pdata); #endif |