diff options
| author | Alison Wang <b18965@freescale.com> | 2012-10-10 09:31:08 +0800 |
|---|---|---|
| committer | Andy Voltz <andy.voltz@timesys.com> | 2012-10-17 14:37:22 -0400 |
| commit | d69fab521df6877782ed38b11677057a5400cbc4 (patch) | |
| tree | 6a25b7355a7ad0f9f2f97492cdf51f35966205c4 /arch/arm/plat-mxc/include/mach | |
| parent | 4663b72fb93a520b6455579d76ed4c1dff46fb05 (diff) | |
ENGR00180956-2: Add FlexTimer PWM support on Faraday
The FlexTimer work on PWM mode with EPWM and CPWM supported.
The API configures each FTM channels the same due to pwm subsystem
interface restriction.
Signed-off-by: Jingchang Lu <b35083@freescale.com>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mvf.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mvf.h b/arch/arm/plat-mxc/include/mach/iomux-mvf.h index faf455e74952..775b0eb5d484 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mvf.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mvf.h @@ -70,6 +70,10 @@ typedef enum iomux_config { #define MVF600_GPIO_GENERAL_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_SPEED_MED | PAD_CTL_PUS_47K_UP | \ PAD_CTL_DSE_25ohm) +#define MVF600_FTM0_CH_CTRL (PAD_CTL_SPEED_LOW | PAD_CTL_OBE_ENABLE | \ + PAD_CTL_ODE | PAD_CTL_DSE_25ohm) +#define MVF600_FTM1_CH_CTRL (PAD_CTL_SPEED_LOW | PAD_CTL_OBE_ENABLE | \ + PAD_CTL_DSE_25ohm) /*SDHC1*/ #define MVF600_PAD14_PTA24__SDHC1_CLK \ IOMUX_PAD(0x0038, 0x0038, 5, 0x0000, 0, MVF600_SDHC_PAD_CTRL) @@ -282,4 +286,22 @@ typedef enum iomux_config { IOMUX_PAD(0x0084, 0x0084, 1, 0x0000, 0, \ MVF600_UART_PAD_CTRL | PAD_CTL_IBE_ENABLE) +/* FlexTimer channel pin */ +#define MVF600_PAD22_PTB0_FTM0CH0 \ + IOMUX_PAD(0x0058, 0x0058, 1, 0x0000, 0, MVF600_FTM0_CH_CTRL) +#define MVF600_PAD23_PTB1_FTM0CH1 \ + IOMUX_PAD(0x005c, 0x005c, 1, 0x0000, 0, MVF600_FTM0_CH_CTRL) +#define MVF600_PAD24_PTB2_FTM0CH2 \ + IOMUX_PAD(0x0060, 0x0060, 1, 0x0000, 0, MVF600_FTM0_CH_CTRL) +#define MVF600_PAD25_PTB3_FTM0CH3 \ + IOMUX_PAD(0x0064, 0x0064, 1, 0x0000, 0, MVF600_FTM0_CH_CTRL) +#define MVF600_PAD28_PTB6_FTM0CH6 \ + IOMUX_PAD(0x0070, 0x0070, 1, 0x0000, 0, MVF600_FTM0_CH_CTRL) +#define MVF600_PAD29_PTB7_FTM0CH7 \ + IOMUX_PAD(0x0074, 0x0074, 1, 0x0000, 0, MVF600_FTM0_CH_CTRL) +/* PAD30 mux with LCD enable signal */ +#define MVF600_PAD30_PTB8_FTM1CH0 \ + IOMUX_PAD(0x0078, 0x0078, 1, 0x032C, 0, MVF600_FTM1_CH_CTRL) +#define MVF600_PAD31_PTB9_FTM1CH1 \ + IOMUX_PAD(0x007C, 0x007C, 1, 0x0330, 0, MVF600_FTM1_CH_CTRL) #endif |