diff options
author | Russell Robinson Jr <rrobinson@phytec.com> | 2012-11-27 10:52:37 -0800 |
---|---|---|
committer | Russell Robinson Jr <rrobinson@phytec.com> | 2013-01-25 16:06:28 -0800 |
commit | 9d7ee1114441401aee095ca522d75ed530e2e894 (patch) | |
tree | f54a22c9c26757dce49ae5f47182418ed1fce4ec /arch/arm/plat-mxc/include | |
parent | c3a8aceebb13cbc4d50bd8a3a781f4ec9ef14951 (diff) |
Initial phyCORE-Vybrid changes
Signed-off-by: Russell Robinson Jr <rrobinson@phytec.com>
Diffstat (limited to 'arch/arm/plat-mxc/include')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mvf.h | 56 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-v3.h | 3 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mvf-dcu-fb.h | 2 |
3 files changed, 41 insertions, 20 deletions
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mvf.h b/arch/arm/plat-mxc/include/mach/iomux-mvf.h index b1bbb0955010..fbc0571f8b9f 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mvf.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mvf.h @@ -47,7 +47,8 @@ typedef enum iomux_config { #define MVF600_ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \ PAD_CTL_DSE_50ohm) -#define MVF600_I2C_PAD_CTRL (PAD_CTL_DSE_50ohm | PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH) +#define MVF600_I2C_PAD_CTRL (PAD_CTL_DSE_50ohm | PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_HIGH | PAD_CTL_ODE) #define MVF600_SAI_PAD_CTRL (PAD_CTL_DSE_50ohm | PAD_CTL_HYS | \ PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) @@ -87,9 +88,9 @@ typedef enum iomux_config { IOMUX_PAD(0x0048, 0x0048, 5, 0x0000, 0, MVF600_SDHC_PAD_CTRL) #define MVF600_PAD19_PTA29__SDHC1_DAT3 \ IOMUX_PAD(0x004C, 0x004C, 5, 0x0000, 0, MVF600_SDHC_PAD_CTRL) -/*set PTA7 as GPIO for sdhc card detecting*/ -#define MVF600_PAD134_PTA7__SDHC1_SW_CD \ - IOMUX_PAD(0x0218, 0x0218, 0, 0x0000, 0, \ +/*set PTD6 as GPIO for sdhc card detecting*/ +#define MVF600_PAD85_PTD6__SDHC1_SW_CD \ + IOMUX_PAD(0x0154, 0x0154, 0, 0x0000, 0, \ MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE) /*I2C0*/ @@ -99,6 +100,18 @@ typedef enum iomux_config { #define MVF600_PAD37_PTB15__I2C0_SDA \ IOMUX_PAD(0x0094, 0x0094, 2, 0x0340, 1, \ MVF600_I2C_PAD_CTRL | PAD_CTL_OBE_IBE_ENABLE) +/*I2C2*/ +#define MVF600_PAD12_PTA22__I2C2_SCL \ + IOMUX_PAD(0x0030, 0x0030, 6, 0x034C, 0, \ + MVF600_I2C_PAD_CTRL | PAD_CTL_OBE_IBE_ENABLE) +#define MVF600_PAD13_PTA23__I2C2_SDA \ + IOMUX_PAD(0x0034, 0x0034, 6, 0x0350, 0, \ + MVF600_I2C_PAD_CTRL | PAD_CTL_OBE_IBE_ENABLE) +/*CAN0*/ +#define MVF600_PAD36_PTB14__CAN0_RX \ + IOMUX_PAD(0x0090, 0x0090, 1, 0x0000, 0, 0) +#define MVF600_PAD37_PTB15__CAN0_TX \ + IOMUX_PAD(0x0094, 0x0094, 1, 0x0000, 0, 0) /*CAN1*/ #define MVF600_PAD38_PTB16__CAN1_RX \ @@ -183,12 +196,16 @@ typedef enum iomux_config { MVF600_ENET_PAD_CTRL | PAD_CTL_OBE_ENABLE) /*USB0/1 VBUS, using the GPIO*/ -#define MVF600_PAD85_PTD6__USB0_VBUS_EN \ - IOMUX_PAD(0x0154, 0x0154, 0, 0x0000, 0, \ - MVF600_GPIO_GENERAL_CTRL) -#define MVF600_PAD92_PTD13__USB1_VBUS_EN \ - IOMUX_PAD(0x0170, 0x0170, 0, 0x0000, 0, \ - MVF600_GPIO_GENERAL_CTRL) +#define MVF600_PAD134_PTA7__USB0_VBUS_EN \ + IOMUX_PAD(0x0218, 0x0218, 0, 0x0000, 0, \ + MVF600_GPIO_GENERAL_CTRL | PAD_CTL_OBE_ENABLE) +#define MVF600_PAD6_PTA16__USB0_VBUS_EN \ + IOMUX_PAD(0x0018, 0x0018, 0, 0x0000, 0, \ + MVF600_GPIO_GENERAL_CTRL | PAD_CTL_OBE_ENABLE) + +#define MVF600_PAD7_PTA17__USB_OC_N \ + IOMUX_PAD(0x001C, 0x001C, 2, 0x0000, 0, \ + PAD_CTL_DSE_20ohm | PAD_CTL_IBE_ENABLE) /*ESAI0(share with FEC1)*/ #define MVF600_PAD54_PTC9__ESAI_SCKT \ @@ -230,19 +247,22 @@ typedef enum iomux_config { #define MVF600_PAD11_PTA21_SAI2_RX_BCLK \ IOMUX_PAD(0x002C, 0x002C, 5, 0x0364, 0, \ MVF600_SAI_PAD_CTRL | PAD_CTL_IBE_ENABLE) -#define MVF600_PAD12_PTA22_SAI2_RX_DATA \ - IOMUX_PAD(0x0030, 0x0030, 5, 0x0368, 0, \ +#define MVF600_PAD23_PTB1_SAI2_RX_DATA \ + IOMUX_PAD(0x005C, 0x005C, 5, 0x0368, 1, \ MVF600_SAI_PAD_CTRL | PAD_CTL_IBE_ENABLE) -#define MVF600_PAD13_PTA23_SAI2_RX_SYNC \ - IOMUX_PAD(0x0034, 0x0034, 5, 0x036c, 0, \ +#define MVF600_PAD24_PTB2_SAI2_RX_SYNC \ + IOMUX_PAD(0x0060, 0x0060, 5, 0x036c, 1, \ MVF600_SAI_PAD_CTRL | PAD_CTL_IBE_ENABLE) #define MVF600_PAD40_PTB18_EXT_AUDIO_MCLK \ IOMUX_PAD(0x00A0, 0x00A0, 2, 0x02ec, 2, \ MVF600_SAI_PAD_CTRL | PAD_CTL_IBE_ENABLE) +#define MVF600_PAD33_PTB11__CKO2 \ + IOMUX_PAD(0x0084, 0x0084, 6, 0x24038, 0x040D, \ + MVF600_SAI_PAD_CTRL | PAD_CTL_IBE_ENABLE) /*DCU0*/ -#define MVF600_PAD30_PTB8_LCD_ENABLE \ - IOMUX_PAD(0x78, 0x78, 0, 0x0000, 0, MVF600_DCU_PAD_CTRL) +#define MVF600_PAD25_PTB3_LCD_ENABLE \ + IOMUX_PAD(0x64, 0x64, 0, 0x0000, 0, MVF600_DCU_PAD_CTRL) #define MVF600_PAD105_PTE0_DCU0_HSYNC \ IOMUX_PAD(0x01A4, 0x01A4, 1, 0x0000, 0, MVF600_DCU_PAD_CTRL) #define MVF600_PAD106_PTE1_DCU0_VSYNC \ @@ -335,8 +355,8 @@ typedef enum iomux_config { IOMUX_PAD(0x007C, 0x007C, 1, 0x0330, 0, MVF600_FTM1_CH_CTRL) /* Touch Screen */ -#define MVF600_PAD21_PTA31_TS_IRQ \ - IOMUX_PAD(0x0054, 0x0054, 0, 0x0000, 0, \ +#define MVF600_PAD32_PTB10_TS_IRQ \ + IOMUX_PAD(0x0080, 0x0080, 0, 0x0000, 0, \ MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE) /*QSPI*/ diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h index 78b8aa2503f5..97a8ca7c7f9a 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h @@ -116,7 +116,8 @@ typedef u64 iomux_v3_cfg_t; #define PAD_CTL_SRE_SLOW (0 << 0) #elif defined(CONFIG_ARCH_MVF) -#define PAD_CTL_SPEED_LOW (1 << 12) +/* FIXED: (1 << 12) is also MED (100 MHz according to TRM) */ +#define PAD_CTL_SPEED_LOW (0 << 12) #define PAD_CTL_SPEED_MED (2 << 12) #define PAD_CTL_SPEED_HIGH (3 << 12) diff --git a/arch/arm/plat-mxc/include/mach/mvf-dcu-fb.h b/arch/arm/plat-mxc/include/mach/mvf-dcu-fb.h index 9a5ba8e396a9..38fcdd4916bf 100644 --- a/arch/arm/plat-mxc/include/mach/mvf-dcu-fb.h +++ b/arch/arm/plat-mxc/include/mach/mvf-dcu-fb.h @@ -32,7 +32,7 @@ struct dfb_chroma_key { __u8 blue_min; }; -#define DCU_LCD_ENABLE_PIN 30 +#define DCU_LCD_ENABLE_PIN 25 #define MFB_SET_CHROMA_KEY _IOW('M', 1, struct mfb_chroma_key) #define MFB_SET_BRIGHTNESS _IOW('M', 3, __u8) |