diff options
| author | Dong Aisheng <b29396@freescale.com> | 2011-07-26 21:54:49 +0800 |
|---|---|---|
| committer | Dong Aisheng <b29396@freescale.com> | 2011-07-27 15:05:18 +0800 |
| commit | 0eec0f39da3bd8afbc556553e24a2a3ca287c0d3 (patch) | |
| tree | dead08234fd0f18990b32f92868b224fc26549bd /arch/arm/plat-mxc | |
| parent | bb2c6f8f0dc1fedd7661668b5aec7ef62ffb3882 (diff) | |
ENGR00153740-5 mx6: add asrc support
Add asrc support for mx6.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Diffstat (limited to 'arch/arm/plat-mxc')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/mx6.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx6.h b/arch/arm/plat-mxc/include/mach/mx6.h index 7ff17ad0d0c1..7aa3b2b3af91 100644 --- a/arch/arm/plat-mxc/include/mach/mx6.h +++ b/arch/arm/plat-mxc/include/mach/mx6.h @@ -139,7 +139,7 @@ #define SSI1_BASE_ADDR (ATZ1_BASE_ADDR + 0x28000) /* slot 10 */ #define SSI2_BASE_ADDR (ATZ1_BASE_ADDR + 0x2C000) /* slot 11 */ #define SSI3_BASE_ADDR (ATZ1_BASE_ADDR + 0x30000) /* slot 12 */ -#define ASRC_BASE_ADDR (ATZ1_BASE_ADDR + 0x34000) /* slot 13 */ +#define MX6Q_ASRC_BASE_ADDR (ATZ1_BASE_ADDR + 0x34000) /* slot 13 */ #define SPBA_BASE_ADDR (ATZ1_BASE_ADDR + 0x3C000) /* slot 15 */ #define MX6Q_VPU_BASE_ADDR (ATZ1_BASE_ADDR + 0x40000) /* slot 33, global en[1], til 0x7BFFF */ @@ -319,7 +319,7 @@ #define MXC_INT_SSI2 79 #define MXC_INT_SSI3 80 #define MXC_INT_ANATOP_TEMPSNSR 81 -#define MXC_INT_ASRC 82 +#define MX6Q_INT_ASRC 82 #define MXC_INT_ESAI 83 #define MXC_INT_SPDIF 84 #define MXC_INT_MLB 85 |