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authorAnson Huang <b20788@freescale.com>2013-01-21 16:20:56 +0800
committerAnson Huang <b20788@freescale.com>2013-01-28 10:09:12 +0800
commit0949f899ae872fe86abe2948999d81136a68d219 (patch)
tree33c86c0f39b9c335e633727537c8aac1adab1374 /arch/arm/plat-mxc
parent3b051d33d5d2dc04c0526d6581f1289043212184 (diff)
ENGR00241003-1 mx6: need to add delay in LDO voltage setting
1.LDO ramp up time may be modified by ROM code according to fuse setting, cpu freq driver use fixed delay time which assume the LDO ramp up time is the reset value of ANATOP register, need to set it to reset value in regulator init. 2.The regulator set voltage should take care of the ramp up time, calculate the ramp up time based of register setting and to the delay, make sure that when the set voltage function return, the voltage is stable enough. 3.CPUFreq no need to use delay, it is already taken care by regulator voltage setting. Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch/arm/plat-mxc')
-rwxr-xr-xarch/arm/plat-mxc/cpufreq.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
index 4cdc8377e972..47a70d96b24c 100755
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/plat-mxc/cpufreq.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -112,7 +112,6 @@ int set_cpu_freq(int freq)
printk(KERN_ERR "COULD NOT SET GP VOLTAGE!!!!\n");
goto err3;
}
- udelay(50);
}
ret = clk_set_rate(cpu_clk, freq);
if (ret != 0) {