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authorRoshni Shah <shah.roshni@yahoo.com>2011-03-14 06:49:42 -0400
committerJustin Waters <justin.waters@timesys.com>2012-03-02 16:59:46 -0500
commit2731b2eadeaa141e6f305fa8086106608112bbaa (patch)
tree2702d45bac84073cd580ccb1bd3eafb9a000d3b6 /arch/arm/plat-mxs/include/mach/bus_freq.h
parent6d23f5084c975be637f7d748db82116bf84d3872 (diff)
Add support for the i.MX53 QSB2.6.35.3-mx53-early-201103141049
This patch seems to have originated from the 11.01.00 release from Freescale, which is no longer available except through the gitweb interface from Freescale. http://opensource.freescale.com/git?p=imx/linux-2.6-imx.git;a=commit;h=27fdf7bae11978d21e8aba09bb635f49b07edd4a
Diffstat (limited to 'arch/arm/plat-mxs/include/mach/bus_freq.h')
-rw-r--r--arch/arm/plat-mxs/include/mach/bus_freq.h46
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm/plat-mxs/include/mach/bus_freq.h b/arch/arm/plat-mxs/include/mach/bus_freq.h
new file mode 100644
index 000000000000..0c41cd2205ff
--- /dev/null
+++ b/arch/arm/plat-mxs/include/mach/bus_freq.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#ifndef BUS_FREQ_H__
+#define BUS_FREQ_H__
+
+#define VERY_HI_RATE 2000000000
+#define LCD_ON_CPU_FREQ_KHZ 261818
+#define OPERATION_WP_SUPPORTED 6
+
+struct profile {
+ int cpu;
+ int ahb;
+ int emi;
+ int ss;
+ int vddd;
+ int vddd_bo;
+ int cur;
+ int vddio;
+ int vdda;
+ u16 xbus;
+ /* map of the upper 16 bits of HW_CLKCTRL_HBUS register */
+ u16 h_autoslow_flags;
+};
+
+/* map of the upper 16 bits of HW_CLKCTRL_HBUS register */
+int is_hclk_autoslow_ok(void);
+
+extern int timing_ctrl_rams(int ss);
+
+#endif