diff options
| author | Ben Dooks <ben-linux@fluff.org> | 2009-05-17 22:18:27 +0100 |
|---|---|---|
| committer | Ben Dooks <ben-linux@fluff.org> | 2009-05-18 16:26:02 +0100 |
| commit | fda7b2b097fed9f88bc93ed3de0caea87ffe778e (patch) | |
| tree | d191152a80a542581451beba66619bc1016bdd3b /arch/arm/plat-s3c24xx/gpiolib.c | |
| parent | 9c7099ca7519268f6ec79782bc06faa27a714d95 (diff) | |
[ARM] S3C24XX: GPIO: Start removal of S3C24XX_GPIO_BASE
The S3C24XX_GPIO_BASE makes it difficult to compress the
GPIO number space, and is only used in a few places of
which everything outside arch/arm/plat-s3c24xx/gpiolib.c
will be removed as soon as possible.
Change gpiolib.c to use the S3C2410_GPxCON register addresses
as the base for each bank, thus eliminating S3C24XX_GPIO_BASE.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c24xx/gpiolib.c')
| -rw-r--r-- | arch/arm/plat-s3c24xx/gpiolib.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c index 3cbec6d3f381..60a9f7247205 100644 --- a/arch/arm/plat-s3c24xx/gpiolib.c +++ b/arch/arm/plat-s3c24xx/gpiolib.c @@ -79,7 +79,7 @@ static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset) struct s3c_gpio_chip s3c24xx_gpios[] = { [0] = { - .base = S3C24XX_GPIO_BASE(S3C2410_GPA0), + .base = S3C2410_GPACON, .pm = __gpio_pm(&s3c_gpio_pm_1bit), .chip = { .base = S3C2410_GPA0, @@ -91,7 +91,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, }, [1] = { - .base = S3C24XX_GPIO_BASE(S3C2410_GPB0), + .base = S3C2410_GPBCON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPB0, @@ -101,7 +101,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, }, [2] = { - .base = S3C24XX_GPIO_BASE(S3C2410_GPC0), + .base = S3C2410_GPCCON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPC0, @@ -111,7 +111,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, }, [3] = { - .base = S3C24XX_GPIO_BASE(S3C2410_GPD0), + .base = S3C2410_GPDCON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPD0, @@ -121,7 +121,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, }, [4] = { - .base = S3C24XX_GPIO_BASE(S3C2410_GPE0), + .base = S3C2410_GPECON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPE0, @@ -131,7 +131,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, }, [5] = { - .base = S3C24XX_GPIO_BASE(S3C2410_GPF0), + .base = S3C2410_GPFCON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPF0, @@ -142,7 +142,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, }, [6] = { - .base = S3C24XX_GPIO_BASE(S3C2410_GPG0), + .base = S3C2410_GPGCON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPG0, |