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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2009-09-12 12:04:37 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-09-12 12:04:37 +0100 |
| commit | 87d721ad7a37b7650dd710c88dd5c6a5bf9fe996 (patch) | |
| tree | 869d633803eb7c429624d3bd16a6117816849763 /arch/arm/plat-s3c24xx | |
| parent | ddd559b13f6d2fe3ad68c4b3f5235fd3c2eae4e3 (diff) | |
| parent | b7cfda9fc3d7aa60cffab5367f2a72a4a70060cd (diff) | |
Merge branch 'master' into devel
Diffstat (limited to 'arch/arm/plat-s3c24xx')
| -rw-r--r-- | arch/arm/plat-s3c24xx/clock-dclk.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/plat-s3c24xx/clock-dclk.c b/arch/arm/plat-s3c24xx/clock-dclk.c index 5b75a797b5ab..0afb217a775e 100644 --- a/arch/arm/plat-s3c24xx/clock-dclk.c +++ b/arch/arm/plat-s3c24xx/clock-dclk.c @@ -129,7 +129,7 @@ static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent) /* calculate the MISCCR setting for the clock */ - if (parent == &clk_xtal) + if (parent == &clk_mpll) source = S3C2410_MISCCR_CLK0_MPLL; else if (parent == &clk_upll) source = S3C2410_MISCCR_CLK0_UPLL; |