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authorJustin Waters <justin.waters@timesys.com>2008-02-26 13:07:02 -0500
committerJustin Waters <justin.waters@timesys.com>2008-02-26 13:07:02 -0500
commitb80a32b9cc634adfa8eaef33ec981e7febf2ade2 (patch)
treef256bce13ba11f514a388160df84e1410bedbe2b /arch/arm26/nwfpe/fpmodule.inl
parent594133ef22fae0d737bd1b57352cf3f48a192c63 (diff)
Update the i.MX31 Kernel to 2.6.232.6.23-mx31ads-2008022618072.6.23-mx31-200802261807
This is the result of a brute-force attempt to update the kernel to 2.6.23. Now that we have a git tree, our effort will be a little nicer in the future. Signed-off-by: Justin Waters <justin.waters@timesys.com>
Diffstat (limited to 'arch/arm26/nwfpe/fpmodule.inl')
-rw-r--r--arch/arm26/nwfpe/fpmodule.inl84
1 files changed, 0 insertions, 84 deletions
diff --git a/arch/arm26/nwfpe/fpmodule.inl b/arch/arm26/nwfpe/fpmodule.inl
deleted file mode 100644
index ef228378ffaf..000000000000
--- a/arch/arm26/nwfpe/fpmodule.inl
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- NetWinder Floating Point Emulator
- (c) Rebel.COM, 1998,1999
-
- Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-*/
-
-extern __inline__
-unsigned int readRegister(const unsigned int nReg)
-{
- /* Note: The CPU thinks it has dealt with the current instruction. As
- a result the program counter has been advanced to the next
- instruction, and points 4 bytes beyond the actual instruction
- that caused the invalid instruction trap to occur. We adjust
- for this in this routine. LDF/STF instructions with Rn = PC
- depend on the PC being correct, as they use PC+8 in their
- address calculations. */
- unsigned int *userRegisters = GET_USERREG();
- unsigned int val = userRegisters[nReg];
- if (REG_PC == nReg) val -= 4;
- return val;
-}
-
-extern __inline__
-void writeRegister(const unsigned int nReg, const unsigned int val)
-{
- unsigned int *userRegisters = GET_USERREG();
- userRegisters[nReg] = val;
-}
-
-extern __inline__
-unsigned int readCPSR(void)
-{
- return(readRegister(REG_CPSR));
-}
-
-extern __inline__
-void writeCPSR(const unsigned int val)
-{
- writeRegister(REG_CPSR,val);
-}
-
-extern __inline__
-unsigned int readConditionCodes(void)
-{
-#ifdef __FPEM_TEST__
- return(0);
-#else
- return(readCPSR() & CC_MASK);
-#endif
-}
-
-extern __inline__
-void writeConditionCodes(const unsigned int val)
-{
- unsigned int *userRegisters = GET_USERREG();
- unsigned int rval;
- /*
- * Operate directly on userRegisters since
- * the CPSR may be the PC register itself.
- */
- rval = userRegisters[REG_CPSR] & ~CC_MASK;
- userRegisters[REG_CPSR] = rval | (val & CC_MASK);
-}
-
-extern __inline__
-unsigned int readMemoryInt(unsigned int *pMem)
-{
- return *pMem;
-}