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authorAndre Przywara <andre.przywara@arm.com>2018-07-30 13:31:31 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-11-20 17:59:36 +0100
commitc82749aed1ca79766eb692e234ac061df8221806 (patch)
tree6f11eedd8164e7c1110090ed387ac3fd004bfdb0 /arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
parentbd0e3c12a07e59e5f5c54130df0e77bc1a468bbb (diff)
arm64: dts: allwinner: a64: Olinuxino: fix DRAM voltage
[ Upstream commit 93366b49a35f3a190052734b3f32c8fe2535b53f ] The Olinuxino board uses DDR3L chips which are supposed to be driven with 1.35V. The reset default of the AXP is properly set to 1.36V. While technically the chips can also run at 1.5 volts, changing the voltage on the fly while booting Linux is asking for trouble. Also running at a lower voltage saves power. So fix the DCDC5 value to match the actual board design. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Martin Lucina <martin@lucina.net> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts')
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
index 338e786155b1..2ef779b02757 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
@@ -120,10 +120,14 @@
/* DCDC3 is polyphased with DCDC2 */
+/*
+ * The board uses DDR3L DRAM chips. 1.36V is the closest to the nominal
+ * 1.35V that the PMIC can drive.
+ */
&reg_dcdc5 {
regulator-always-on;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
+ regulator-min-microvolt = <1360000>;
+ regulator-max-microvolt = <1360000>;
regulator-name = "vcc-ddr3";
};