diff options
author | Clark Wang <xiaoning.wang@nxp.com> | 2018-11-01 18:53:39 +0800 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:34:54 +0800 |
commit | 0baf2004df381b32e4b566fb6b461254d8a531ce (patch) | |
tree | f18b7ac0b365574db12a77953e2466ed78e4c1ed /arch/arm64/boot/dts/freescale/fsl-imx8mm-ddr3l-val.dts | |
parent | 363a2e09c32913779c9ea7d59eee4b5765808a78 (diff) |
MLK-20165-2 imx8mm_ddr3l_val: Add SPI NOR support
iMX8MM DDR3L validation board uses FPGA to link with SPI NOR flash with
ECSPI1. Add pin configurations and ecspi1 node to enable ECSPI1 to access
SPI NOR.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8mm-ddr3l-val.dts')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8mm-ddr3l-val.dts | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mm-ddr3l-val.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mm-ddr3l-val.dts index b65ab5fbc888..86d7c58fe81d 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8mm-ddr3l-val.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8mm-ddr3l-val.dts @@ -40,6 +40,20 @@ pinctrl-names = "default"; imx8mm-val { + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 + MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 + MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 + >; + }; + + pinctrl_ecspi1_cs: ecspi1cs { + fsl,pins = < + MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x40000 + >; + }; + pinctrl_fec1: fec1grp { fsl,pins = < MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 @@ -147,6 +161,24 @@ }; }; +&ecspi1 { + #address-cells = <1>; + #size-cells = <0>; + fsl,spi-num-chipselects = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>; + cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; + status = "okay"; + + flash: m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "gd25q16", "jedec,spi-nor"; + spi-max-frequency = <20000000>; + reg = <0>; + }; +}; + &i2c1 { clock-frequency = <400000>; pinctrl-names = "default"; |