diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2018-05-04 18:20:52 +0800 |
|---|---|---|
| committer | Leonard Crestez <leonard.crestez@nxp.com> | 2018-08-24 12:41:33 +0300 |
| commit | fe526cb74356e969b1bf5ff189e7c8698456322c (patch) | |
| tree | c132321e9e1729a42dedbc983870b71cd7747a9a /arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi | |
| parent | e6d3a3316a66347231cc319949c5d849000744f3 (diff) | |
MLK-18205-16 ARM64: dts: freescale: imx8mm: add cpu-freq support
Add i.MX8MM OPP table to support cpu-freq.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi index 7d9dae24137c..b5b381bc0cec 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi @@ -877,3 +877,19 @@ status = "disabled"; }; }; + +&A53_0 { + operating-points = < + /* kHz uV */ + 1800000 1000000 + 1600000 900000 + 1200000 800000 + >; + clocks = <&clk IMX8MM_CLK_A53_DIV>, <&clk IMX8MM_CLK_A53_SRC>, + <&clk IMX8MM_ARM_PLL>, <&clk IMX8MM_ARM_PLL_OUT>, + <&clk IMX8MM_SYS_PLL1_800M>; + clock-names = "a53", "arm_a53_src", "arm_pll", + "arm_pll_out", "sys1_pll_800m"; + clock-latency = <61036>; + #cooling-cells = <2>; +}; |