diff options
| author | Oliver Brown <oliver.brown@nxp.com> | 2018-08-02 07:51:26 -0500 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2018-10-29 11:10:38 +0800 |
| commit | 4a3f9d071a34c4ddf035364eb685306e6cd83e4f (patch) | |
| tree | 4d8864678e4daebee3e1f9077120e2af99f932e5 /arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | |
| parent | 7aefea3d7af26ecb30c5d296a4dd1bf01d2c3b10 (diff) | |
MLK-19119 arm64: dts: imx8qm: Correct bus clock for HDMI Interrupt Steer
The Local Interrupt Steer Clock Bus Clock (LIS IPG) should be 83.375 MHz.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi index be75f8cf2ad3..64e703b41fb8 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-device.dtsi @@ -2707,7 +2707,7 @@ clock-names = "ipg"; assigned-clocks = <&clk IMX8QM_HDMI_DIG_PLL_CLK>, <&clk IMX8QM_HDMI_LIS_IPG_CLK>; - assigned-clock-rates = <675000000>, <85000000>; + assigned-clock-rates = <675000000>, <84375000>; power-domains = <&pd_hdmi>; }; |