diff options
| author | Peng Fan <peng.fan@nxp.com> | 2018-09-14 21:20:27 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:34:14 +0800 |
| commit | 8f5c5db21b587f8286d006b1b8f7a6a7a9b4d556 (patch) | |
| tree | beb7b3f28357a3b94bda26dbf349ad64872c5a50 /arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-domu.dts | |
| parent | 47e828d2913fb07ca17269fe2ce6a523a4b27f57 (diff) | |
MLK-19664-3 ARM64: dts: imx8qm domu: passthrough pcie to DomU
Passthrough pcie to DomU to support pcie wifi.
Add the needed GPIOs in dom0 dts.
Add SMMU hook for pciea.
Modify the reserved-memory for pcie usage.
passthrough pcie related LPCG to make sure domu not panic when access
LPCG.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-domu.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-domu.dts | 46 |
1 files changed, 41 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-domu.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-domu.dts index a3b47a93f7ea..e6b0bf820bbf 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-domu.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-domu.dts @@ -88,9 +88,13 @@ * */ - rpmsg_reserved: rpmsg@0x90100000 { + /* + * CM40 rpmsg memory is still for Dom0, the domu.cfg + * not map 0x90000000 - 0x90100000 to DomU. + */ + rpmsg_reserved: rpmsg@0x90000000 { no-map; - reg = <0 0x90100000 0 0x20000>; + reg = <0 0x90000000 0 0x400000>; }; /* global autoconfigured region for contiguous allocations */ @@ -172,6 +176,21 @@ compatible = "fsl,imx8qm-iomuxc"; }; + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + epdev_on: fixedregulator@100 { + compatible = "regulator-fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "epdev_on"; + gpio = <&gpio4 9 0>; + enable-active-high; + }; + }; + #include "fsl-imx8qm-device.dtsi" mu2: mu@5d1d0000 { @@ -433,7 +452,6 @@ /delete-node/ &edma0; /delete-node/ &edma2; /delete-node/ &edma3; - &gpio0 { /delete-property/ power-domains; status = "disabled"; @@ -555,9 +573,17 @@ only-dma-mask32 = <1>; }; -/delete-node/ &hsio; /delete-node/ &ocotp; -/delete-node/ &pciea; +&pciea { + ext_osc = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pciea>; + disable-gpio = <&gpio1 13 GPIO_ACTIVE_LOW>; + reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>; + clkreq-gpio = <&gpio4 27 GPIO_ACTIVE_LOW>; + epdev_on-supply = <&epdev_on>; + status = "okay"; +}; /delete-node/ &pcieb; /delete-node/ &sata; @@ -658,6 +684,16 @@ SC_P_QSPI1A_DQS_LSIO_GPIO4_IO22 0x00000021 >; }; + + pinctrl_pciea: pcieagrp{ + fsl,pins = < + SC_P_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27 0x04000021 + SC_P_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28 0x04000021 + SC_P_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29 0x04000021 + SC_P_LVDS1_I2C0_SDA_LSIO_GPIO1_IO13 0x06000000 + SC_P_USDHC2_RESET_B_LSIO_GPIO4_IO09 0x04000021 + >; + }; }; }; |