diff options
| author | Huang Chaofan <chaofan.huang@nxp.com> | 2018-06-06 14:02:43 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:32:03 +0800 |
| commit | 7a9ffad308a8ec4fc23ea268fdbeff6fbd30b79c (patch) | |
| tree | 50966eb90e0624abc9eab6185a421c79d3005d0b /arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi | |
| parent | a2a5bd7bf237afd7422d161e78b19bbc76d24c46 (diff) | |
MLK-17305 [MX8QXP-MEK] VPU: "couldn't set vpu_dec_clk clk rate to
600000000 (-22)" and "clk: couldn't set vpu_enc_clk clk rate to
600000000 (-22), current rate: 0" when boot up. 100%
vpu clock is not settable, remove the assigned-clock-rates from the dts
Signed-off-by: Huang Chaofan <chaofan.huang@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi index a3cb4d60c515..43c0a41a6d78 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi @@ -3113,7 +3113,6 @@ clocks = <&clk IMX8QXP_VPU_DEC_CLK>; clock-names = "vpu_clk"; assigned-clocks = <&clk IMX8QXP_VPU_DEC_CLK>; - assigned-clock-rates = <600000000>; power-domains = <&pd_vpu_dec>; status = "disabled"; }; @@ -3127,7 +3126,6 @@ clocks = <&clk IMX8QXP_VPU_ENC_CLK>; clock-names = "vpu_encoder_clk"; assigned-clocks = <&clk IMX8QXP_VPU_ENC_CLK>; - assigned-clock-rates = <600000000>; power-domains = <&pd_vpu_enc>; status = "disabled"; }; |