diff options
| author | Andrejs Cainikovs <andrejs.cainikovs@toradex.com> | 2022-06-17 11:39:00 +0200 |
|---|---|---|
| committer | Andrejs Cainikovs <andrejs.cainikovs@toradex.com> | 2022-06-23 13:42:29 +0200 |
| commit | 6a3f4414ce7ced0cf376425649b2a31481b77899 (patch) | |
| tree | 2d7a0c06e57a399d55b235b96226c69234d0e4b5 /arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi | |
| parent | 9131b7c87523be2c365f0bf14c9800409ef5b790 (diff) | |
arm64: dts: apalis-imx8: fix ixora pinmux config
This fixes Ixora pinmux configuration, which should be defined within
apalis-imx8qm block.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi | 26 |
1 files changed, 14 insertions, 12 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi index 53f56dc8f536..2af7b816edb8 100644 --- a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi @@ -255,19 +255,21 @@ <&pinctrl_sim0_gpios>, <&pinctrl_usdhc1_gpios>, <&pinctrl_uart24_forceoff>; - pinctrl_leds_ixora: ledsixoragrp { - fsl,pins = < - IMX8QM_USDHC2_DATA1_LSIO_GPIO5_IO27 0x41 /* LED_4_GREEN */ - IMX8QM_USDHC2_DATA3_LSIO_GPIO5_IO29 0x41 /* LED_4_RED */ - IMX8QM_USDHC1_DATA5_LSIO_GPIO5_IO20 0x41 /* LED_5_GREEN */ - IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21 0x41 /* LED_5_RED */ - >; - }; + apalis-imx8qm { + pinctrl_leds_ixora: ledsixoragrp { + fsl,pins = < + IMX8QM_USDHC2_DATA1_LSIO_GPIO5_IO27 0x41 /* LED_4_GREEN */ + IMX8QM_USDHC2_DATA3_LSIO_GPIO5_IO29 0x41 /* LED_4_RED */ + IMX8QM_USDHC1_DATA5_LSIO_GPIO5_IO20 0x41 /* LED_5_GREEN */ + IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21 0x41 /* LED_5_RED */ + >; + }; - pinctrl_uart24_forceoff: uart24forceoffgrp { - fsl,pins = < - IMX8QM_USDHC2_CMD_LSIO_GPIO5_IO25 0x21 - >; + pinctrl_uart24_forceoff: uart24forceoffgrp { + fsl,pins = < + IMX8QM_USDHC2_CMD_LSIO_GPIO5_IO25 0x21 + >; + }; }; }; |