diff options
| author | Andrejs Cainikovs <andrejs.cainikovs@toradex.com> | 2022-06-01 13:41:28 +0200 |
|---|---|---|
| committer | Andrejs Cainikovs <andrejs.cainikovs@toradex.com> | 2022-06-23 13:42:29 +0200 |
| commit | 82bb9b9c3245924fd5f57366f582cdeffaf51133 (patch) | |
| tree | 9dde11171e46e1343886347df45273af5a8506ee /arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi | |
| parent | 6a3f4414ce7ced0cf376425649b2a31481b77899 (diff) | |
arm64: dts: apalis-imx8: ixora sd card is 4-bit
Ixora board v1.1 MicroSD card is 4-bit wide, same as v1.2.
This change leaves data pins 4-7 not configured, so that
these can be used for other purposes.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi index 2af7b816edb8..0a9a3bd4023c 100644 --- a/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi @@ -270,6 +270,50 @@ IMX8QM_USDHC2_CMD_LSIO_GPIO5_IO25 0x21 >; }; + + /* Apalis MMC1_CD# */ + pinctrl_mmc1_cd: mmc1cdgrp { + fsl,pins = < + IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 0x00000021 + >; + }; + + /* Apalis MMC1 */ + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 + IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021 + IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021 + IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021 + IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021 + IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021 + + /* On-module PMIC use */ + IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021 + >; + }; + + /* Apalis MMC1_CD# */ + pinctrl_mmc1_cd_sleep: mmc1cdgrp { + fsl,pins = < + IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 0x04000041 + >; + }; + + /* Apalis MMC1 */ + pinctrl_usdhc2_sleep: usdhc2grp { + fsl,pins = < + IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x04000041 + IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x04000041 + IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x04000041 + IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x04000041 + IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x04000041 + IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x04000041 + + /* On-module PMIC use */ + IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x04000041 + >; + }; }; }; @@ -405,6 +449,12 @@ /* Apalis MMC1 */ &usdhc2 { + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_mmc1_cd>; + pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_mmc1_cd>; + pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_mmc1_cd>; + pinctrl-3 = <&pinctrl_usdhc2_sleep &pinctrl_mmc1_cd_sleep>; + bus-width = <4>; status = "okay"; }; |