diff options
author | Clark Wang <xiaoning.wang@nxp.com> | 2019-11-15 19:54:52 +0800 |
---|---|---|
committer | Dong Aisheng <aisheng.dong@nxp.com> | 2021-11-02 16:52:32 +0800 |
commit | 8babf76bb7a60580affc5d12d24f241911936b52 (patch) | |
tree | b4168bf9f339d3faad8f1bd739d4d25535d39935 /arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi | |
parent | b4113bacd75d3a78c921deb48cc108747c3cdbe3 (diff) |
MLK-23000-3 ARM64: dts: imx8qxp: add mlb dts
Add mlb dts file for imx8qxp-lpddr4-val platform.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi index b50941d83e9e..23f536cab8b1 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi @@ -151,6 +151,20 @@ conn_subsys: bus@5b000000 { status = "disabled"; }; + mlb: mlb@5b060000 { + compatible = "fsl,imx8qxp-mlb150"; + reg = <0x5B060000 0x10000>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mlb_lpcg 0>, + <&mlb_lpcg 1>, + <&mlb_lpcg 2>; + clock-names = "mlb", "hclk", "ipg"; + power-domains = <&pd IMX_SC_R_MLB_0>; + status = "disabled"; + }; + usb3phynop1: usb3-phy { compatible = "usb-nop-xceiv"; clocks = <&usb3_lpcg 4>; @@ -267,6 +281,20 @@ conn_subsys: bus@5b000000 { power-domains = <&pd IMX_SC_R_ENET_1>; }; + mlb_lpcg: clock-controller@5b260000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x5b260000 0x10000>; + #clock-cells = <1>; + clocks = <&conn_axi_clk>, + <&conn_axi_clk>, + <&conn_ipg_clk>; + bit-offset = <0 20 16>; + clock-output-names = "mlb_lpcg_clk", + "mlb_lpcg_hclk", + "mlb_lpcg_ipg_clk"; + power-domains = <&pd IMX_SC_R_MLB_0>; + }; + usb2_lpcg: clock-controller@5b270000 { compatible = "fsl,imx8qxp-lpcg"; reg = <0x5b270000 0x10000>; |