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authorPeter Chen <peter.chen@nxp.com>2020-02-26 09:39:46 +0800
committerPeter Chen <peter.chen@nxp.com>2020-02-28 11:15:58 +0800
commit40688bff75c201df026aab8e0fdad26758b5bd9d (patch)
tree0b75ba8ceb9ec91bcfadb6e64cb5163955e95612 /arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
parent282ed22da06347b2b582fed09ef5ef1655728093 (diff)
MLK-23349-5 ARM64: dts: imx8-ss-conn: specific USB3 clocks rate
IC confirmed the both imx8qm and imx8qxp could use 250M as usb3_clk and no performance drop. Reviewed-by: Jun Li <jun.li@nxp.com> Signed-off-by: Peter Chen <peter.chen@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
index edeb60ab59b2..4eb51cad186d 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
@@ -199,6 +199,10 @@ conn_subsys: bus@5b000000 {
<&usb3_lpcg 3>;
clock-names = "usb3_lpm_clk", "usb3_bus_clk", "usb3_aclk",
"usb3_ipg_clk", "usb3_core_pclk";
+ assigned-clocks = <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_PER>,
+ <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MISC>,
+ <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MST_BUS>;
+ assigned-clock-rates = <125000000>, <12000000>, <250000000>;
power-domains = <&pd IMX_SC_R_USB_2>;
cdns3,usbphy = <&usb3phynop1>;
status = "disabled";