diff options
| author | Dong Aisheng <aisheng.dong@nxp.com> | 2019-01-07 20:50:21 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:04:49 +0800 |
| commit | db0866d1d1595b34f482989110e41815d9ece279 (patch) | |
| tree | 0ffb852326d7f63eda30c2e2ff3aba94ab34820e /arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi | |
| parent | 9d055faa28414b0fd10113393a4fa2226f36cef6 (diff) | |
arm64: dts: imx8qxp: orginize dts in subsystems
MX8 SoC is comprised of a few HW subsystems while some of them can be
reused in the different SoCs. So let's re-orginize them into subsystems
in device tree as well for the possible reuse of the common part.
Note, as there's still no devices of hsio subsys, so removed it
first instead of creating a subsys headfile with no devices.
They will be added back when new devices added.
NOTE: this is a complementary patch of
c24fc267a8a9 ("arm64: dts: imx8qxp: orginize dts in subsystems"
based on latest upstream versions.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi index 68c79baa80bf..59d6afd9d8e5 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi @@ -48,7 +48,6 @@ conn_subsys: bus@5b000000 { }; usdhc1: mmc@5b010000 { - compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc"; interrupt-parent = <&gic>; interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>; reg = <0x5b010000 0x10000>; @@ -65,7 +64,6 @@ conn_subsys: bus@5b000000 { }; usdhc2: mmc@5b020000 { - compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc"; interrupt-parent = <&gic>; interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>; reg = <0x5b020000 0x10000>; @@ -82,7 +80,6 @@ conn_subsys: bus@5b000000 { }; usdhc3: mmc@5b030000 { - compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc"; interrupt-parent = <&gic>; interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>; reg = <0x5b030000 0x10000>; @@ -99,7 +96,6 @@ conn_subsys: bus@5b000000 { }; fec1: ethernet@5b040000 { - compatible = "fsl,imx8qm-fec", "fsl,imx6sx-fec"; reg = <0x5b040000 0x10000>; interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, @@ -121,7 +117,6 @@ conn_subsys: bus@5b000000 { }; fec2: ethernet@5b050000 { - compatible = "fsl,imx8qm-fec", "fsl,imx6sx-fec"; reg = <0x5b050000 0x10000>; interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, |