diff options
| author | Robin Gong <yibin.gong@nxp.com> | 2019-11-12 03:44:05 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:09:41 +0800 |
| commit | f11d5aa6dcd2fc7bc29acbb4e05bb72870e529a6 (patch) | |
| tree | ca5e37a47310772d9f6acfb91c7d1c6f982f7e8d /arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | |
| parent | c1e14884a3bdcc64cdf077dad38f5ed4123d1de3 (diff) | |
MLK-22284-3 ARM64: dts: freescale: imx8dx/qm: split dma channel power domain
Split dma channel power domain from sub-domain of dma customer driver
such as Audio, LPUART etc.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 30 |
1 files changed, 18 insertions, 12 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index 4cb11cdd83aa..6feb7d1129e6 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -67,10 +67,8 @@ dma_subsys: bus@5a000000 { clock-names = "ipg", "baud"; assigned-clocks = <&clk IMX_SC_R_UART_1 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <80000000>; - power-domains = <&pd IMX_SC_R_UART_1>, - <&pd IMX_SC_R_DMA_2_CH10>, - <&pd IMX_SC_R_DMA_2_CH11>; - power-domain-names = "uart", "rxdma", "txdma"; + power-domains = <&pd IMX_SC_R_UART_1>; + power-domain-names = "uart"; dma-names = "tx","rx"; dmas = <&edma2 11 0 0>, <&edma2 10 0 1>; @@ -85,10 +83,8 @@ dma_subsys: bus@5a000000 { clock-names = "ipg", "baud"; assigned-clocks = <&clk IMX_SC_R_UART_2 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <80000000>; - power-domains = <&pd IMX_SC_R_UART_2>, - <&pd IMX_SC_R_DMA_2_CH12>, - <&pd IMX_SC_R_DMA_2_CH13>; - power-domain-names = "uart", "rxdma", "txdma"; + power-domains = <&pd IMX_SC_R_UART_2>; + power-domain-names = "uart"; dma-names = "tx","rx"; dmas = <&edma2 13 0 0>, <&edma2 12 0 1>; @@ -103,10 +99,8 @@ dma_subsys: bus@5a000000 { clock-names = "ipg", "baud"; assigned-clocks = <&clk IMX_SC_R_UART_3 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <80000000>; - power-domains = <&pd IMX_SC_R_UART_3>, - <&pd IMX_SC_R_DMA_2_CH14>, - <&pd IMX_SC_R_DMA_2_CH15>; - power-domain-names = "uart", "rxdma", "txdma"; + power-domains = <&pd IMX_SC_R_UART_3>; + power-domain-names = "uart"; dma-names = "tx","rx"; dmas = <&edma2 15 0 0>, <&edma2 14 0 1>; @@ -152,6 +146,18 @@ dma_subsys: bus@5a000000 { "edma2-chan10-rx", "edma2-chan11-tx", "edma2-chan12-rx", "edma2-chan13-tx", "edma2-chan14-rx", "edma2-chan15-tx"; + power-domains = <&pd IMX_SC_R_DMA_2_CH8>, + <&pd IMX_SC_R_DMA_2_CH9>, + <&pd IMX_SC_R_DMA_2_CH10>, + <&pd IMX_SC_R_DMA_2_CH11>, + <&pd IMX_SC_R_DMA_2_CH12>, + <&pd IMX_SC_R_DMA_2_CH13>, + <&pd IMX_SC_R_DMA_2_CH14>, + <&pd IMX_SC_R_DMA_2_CH15>; + power-domain-names = "edma2-chan8", "edma2-chan9", + "edma2-chan10", "edma2-chan11", + "edma2-chan12", "edma2-chan13", + "edma2-chan14", "edma2-chan15"; status = "disabled"; }; |