summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
diff options
context:
space:
mode:
authorAndrejs Cainikovs <andrejs.cainikovs@toradex.com>2022-07-08 14:42:04 +0200
committerMax Krummenacher <max.krummenacher@toradex.com>2022-11-15 14:19:48 +0100
commit10cb7c0426816262554f44c80a6cf48f54bd89ea (patch)
tree7d72ba1659187373796989860457f8aee0d1f02d /arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
parentdd771f03c887a4f34fb7aa0ef3bca3fec785300e (diff)
arm64: dts: imx8mm-verdin: update CAN clock to 40MHz
Update SPI CAN controller clock to match current hardware design. Upstream-Status: Backport [be1e3dfecf7d2fbcb4a45b113da637983878246c] Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com> Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
index 5d784672ba8b..59fafadfbffc 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
@@ -31,10 +31,10 @@
};
/* Fixed clock dedicated to SPI CAN controller */
- clk20m: oscillator {
+ clk40m: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency = <20000000>;
+ clock-frequency = <40000000>;
};
gpio-keys {
@@ -207,7 +207,7 @@
can1: can@0 {
compatible = "microchip,mcp251xfd";
- clocks = <&clk20m>;
+ clocks = <&clk40m>;
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1_int>;