diff options
| author | Sherry Sun <sherry.sun@nxp.com> | 2022-04-08 14:14:51 +0800 |
|---|---|---|
| committer | Sherry Sun <sherry.sun@nxp.com> | 2022-04-08 16:13:49 +0800 |
| commit | 279c5ec310c2bfbc0d02436c2e97f27e2e946a96 (patch) | |
| tree | 1fc7900de23cb17ecbbc52b752b0f7995535af69 /arch/arm64/boot/dts/freescale/imx8mp-evk.dts | |
| parent | bfe73f161d6d2a0ca6def040465db0231f6c08a1 (diff) | |
MLK-25863: arm64: dts: imx8mpevk: correct the uart2 pinctl value
According to the IOMUXC_SW_PAD_CTL_PAD_UART2_RXD/TXD register define in
imx8mp RM, bit0 and bit2 are reserved, and the uart2 rx/tx pin should
enable the pull up, so need to set bit8 to 1. The original pinctl value
0x49 is incorrect and needs to be changed to 0x140, same as uart1 and
uart3.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp-evk.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index efa0c3fa8346..1732b5c72380 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -1149,8 +1149,8 @@ pinctrl_uart2: uart2grp { fsl,pins = < - MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x49 - MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x49 + MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140 + MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140 >; }; |