diff options
| author | Haibo Chen <haibo.chen@nxp.com> | 2021-04-01 17:23:40 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2021-11-02 16:50:56 +0800 |
| commit | 5534fcd66c5d2d260d1bfe118d262d847f206488 (patch) | |
| tree | 8b71320b63b96ccc92b64e7b17b2c29bf9d4f50d /arch/arm64/boot/dts/freescale/imx8mq-evk.dts | |
| parent | a1b1d7b416c32fb3d06da8e17b06a7d35a7a0d95 (diff) | |
ARM: dts: change the write bus width to 1
commit 0e30f47232ab ("mtd: spi-nor: add support for DTR protocol")
change the erase bus width path. The patch will set the erase buswidth
as write_protocol buswidth, since we only use single line write.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mq-evk.dts')
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts index d49dcb5d1ff4..59b94d9ed39f 100755 --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts @@ -768,7 +768,7 @@ #size-cells = <1>; compatible = "jedec,spi-nor"; spi-max-frequency = <29000000>; - spi-tx-bus-width = <4>; + spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-nor,ddr-quad-read-dummy = <6>; }; |