diff options
author | Anson Huang <Anson.Huang@nxp.com> | 2019-11-06 09:50:10 +0800 |
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committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:09:10 +0800 |
commit | 414eb312b28c62be0bf7e69b55bf17f774763761 (patch) | |
tree | 0ab8383e289ca1a2c0faf7b85cc84d0abf145d6c /arch/arm64/boot/dts/freescale/imx8qxp-ddr3l-val.dts | |
parent | 08ad932a5a3d2dfc593c1a2796a32d309a6f3538 (diff) |
arm64: dts: imx8qxp: Add DDR3L validation board support
Add i.MX8QXP DDR3L validation board support.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8qxp-ddr3l-val.dts')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qxp-ddr3l-val.dts | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ddr3l-val.dts b/arch/arm64/boot/dts/freescale/imx8qxp-ddr3l-val.dts new file mode 100644 index 000000000000..05411ec714a6 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qxp-ddr3l-val.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +/dts-v1/; + +#include "imx8qxp-lpddr4-val.dts" + +/ { + model = "Freescale i.MX8QXP DDR3L VALIDATION"; + compatible = "fsl,imx8qxp-ddr3l-val", "fsl,imx8qxp"; + + reserved-memory { + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0 0x14000000>; + alloc-ranges = <0 0x96000000 0 0x14000000>; + linux,cma-default; + }; + }; +}; |