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authorGrzegorz Jaszczyk <jaz@semihalf.com>2017-08-09 16:44:37 +0200
committerGregory CLEMENT <gregory.clement@free-electrons.com>2017-08-14 16:30:43 +0200
commit0ea62502a5146cfe98696a152894ebb9afbee9d4 (patch)
tree85a8b0d19b1da993ee8e6654f6f409572010315a /arch/arm64/boot/dts/marvell
parent915c71da13cb1176a029eee3e63a73c28bb0bf59 (diff)
ARM64: dts: marvell: enable USB host on Armada-8040-DB
Enable USB host on Armada-8040-DB by adding USB PHY nodes for the following ports: - host 0 and 1 of CPM - host 0 of CPS These PHY are enabled by lanes coming from regulators based on two I2C expanders. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm64/boot/dts/marvell')
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8040-db.dts65
1 files changed, 65 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-db.dts b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
index 1e8f7242ed6f..0d7b2ae46610 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
@@ -44,6 +44,7 @@
* Device Tree file for Marvell Armada 8040 Development board platform
*/
+#include <dt-bindings/gpio/gpio.h>
#include "armada-8040.dtsi"
/ {
@@ -59,6 +60,48 @@
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
+
+ cpm_reg_usb3_0_vbus: cpm-usb3-0-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "cpm-usb3h0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
+ };
+
+ cpm_reg_usb3_1_vbus: cpm-usb3-1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "cpm-usb3h1-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&expander0 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ cpm_usb3_0_phy: cpm-usb3-0-phy {
+ compatible = "usb-nop-xceiv";
+ vcc-supply = <&cpm_reg_usb3_0_vbus>;
+ };
+
+ cpm_usb3_1_phy: cpm-usb3-1-phy {
+ compatible = "usb-nop-xceiv";
+ vcc-supply = <&cpm_reg_usb3_1_vbus>;
+ };
+
+ cps_reg_usb3_0_vbus: cps-usb3-0-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "cps-usb3h0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&expander1 0 GPIO_ACTIVE_HIGH>;
+ };
+
+ cps_usb3_0_phy: cps-usb3-0-phy {
+ compatible = "usb-nop-xceiv";
+ vcc-supply = <&cps_reg_usb3_0_vbus>;
+ };
};
&i2c0 {
@@ -107,6 +150,25 @@
&cpm_i2c0 {
status = "okay";
clock-frequency = <100000>;
+
+ /* U31 */
+ expander0: pca9555@21 {
+ compatible = "nxp,pca9555";
+ pinctrl-names = "default";
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x21>;
+ };
+
+ /* U25 */
+ expander1: pca9555@25 {
+ compatible = "nxp,pca9555";
+ pinctrl-names = "default";
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0x25>;
+ };
+
};
/* CON4 on CP0 expansion */
@@ -116,11 +178,13 @@
/* CON9 on CP0 expansion */
&cpm_usb3_0 {
+ usb-phy = <&cpm_usb3_0_phy>;
status = "okay";
};
/* CON10 on CP0 expansion */
&cpm_usb3_1 {
+ usb-phy = <&cpm_usb3_1_phy>;
status = "okay";
};
@@ -159,6 +223,7 @@
/* CON9 on CP1 expansion */
&cps_usb3_0 {
+ usb-phy = <&cps_usb3_0_phy>;
status = "okay";
};