diff options
| author | Alexis Ballier <aballier@gentoo.org> | 2019-03-15 15:58:21 +0100 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2019-03-18 08:45:47 +0100 |
| commit | 5e3f8027897c59e5c59918d544f1344527e43406 (patch) | |
| tree | a75dfa0a5c99d74689a885bde21856892ee46ae6 /arch/arm64/boot/dts/rockchip | |
| parent | ba12fdd5108573b07894b1749a1859bee4f1b792 (diff) | |
arm64: dts: rockchip: Add the fusb typec manager to rk3399-orangepi
Also rename its regulator to match the schematic names.
Signed-off-by: Alexis Ballier <aballier@gentoo.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 26 |
1 files changed, 21 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts index 96ccbe5c4f0c..2166be171df8 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts @@ -136,13 +136,13 @@ vin-supply = <&vcc_sys>; }; - vcc5v0_typec0: vcc5v0-typec0-regulator { + vbus_typec: vbus-typec-regulator { compatible = "regulator-fixed"; enable-active-high; gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_typec0_en>; - regulator-name = "vcc5v0_typec0"; + pinctrl-0 = <&vcc5v0_typec_en>; + regulator-name = "vbus_typec"; vin-supply = <&vcc_sys>; }; @@ -505,6 +505,16 @@ pinctrl-0 = <&light_int_l>; vdd-supply = <&vcc3v3_s3>; }; + + fusb302@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio1>; + interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&chg_cc_int_l>; + vbus-supply = <&vbus_typec>; + }; }; &io_domains { @@ -547,7 +557,7 @@ <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; }; - vcc5v0_typec0_en: vcc5v0-typec0-en { + vcc5v0_typec_en: vcc5v0-typec-en { rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; }; @@ -596,6 +606,12 @@ rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + fusb302 { + chg_cc_int_l: chg-cc-int-l { + rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; }; &pwm0 { @@ -677,7 +693,7 @@ status = "okay"; u2phy0_otg: otg-port { - phy-supply = <&vcc5v0_typec0>; + phy-supply = <&vbus_typec>; status = "okay"; }; |