diff options
| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2016-08-31 12:05:17 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2016-09-02 11:47:51 +0100 |
| commit | a9be2ee09385387819ca22bf6522b2437334489e (patch) | |
| tree | fbd32e90246ccb9ba12f4f6bda0f9463ebe24b4a /arch/arm64/kernel/head.S | |
| parent | 60699ba18b69ff210ed0304bc23f6c9d11d27a72 (diff) | |
arm64: head.S: document the use of callee saved registers
Now that the only remaining occurrences of the use of callee saved
registers are on the primary boot path, add a comment to the code
which register is used for what.
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel/head.S')
| -rw-r--r-- | arch/arm64/kernel/head.S | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 29a734ee0770..427f6d3f084c 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -208,6 +208,16 @@ efi_header_end: __INIT + /* + * The following callee saved general purpose registers are used on the + * primary lowlevel boot path: + * + * Register Scope Purpose + * x21 stext() .. start_kernel() FDT pointer passed at boot in x0 + * x23 stext() .. start_kernel() physical misalignment/KASLR offset + * x28 __create_page_tables() callee preserved temp register + * x19/x20 __primary_switch() callee preserved temp registers + */ ENTRY(stext) bl preserve_boot_args bl el2_setup // Drop to EL1, w0=cpu_boot_mode |