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authorPhilippe Schenker <philippe.schenker@toradex.com>2019-01-31 15:30:29 +0100
committerPhilippe Schenker <philippe.schenker@toradex.com>2019-03-11 15:49:39 +0100
commitc1016f5da0dbb8291575949e7f4a417c6306d70a (patch)
tree1bced6ca96bc5a7b20d3e302637224a892a05502 /arch/arm
parent2d0ac35ddfb291101bbea6707c4d44ee63466d12 (diff)
ARM: dts: imx6: Add sleep state to can interfaces
This patch prepares the devicetree for the new Ixora V1.2 where we are able to turn off the supply of the can transceiver. This implies to use a sleep state on transmission pins in order to prevent backfeeding. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/imx6qdl-apalis.dtsi27
1 files changed, 21 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
index cfaaa571c158..f65028c8911f 100644
--- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
@@ -246,14 +246,16 @@
};
&can1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan1>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_flexcan1_default>;
+ pinctrl-1 = <&pinctrl_flexcan1_sleep>;
status = "disabled";
};
&can2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan2>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_flexcan2_default>;
+ pinctrl-1 = <&pinctrl_flexcan2_sleep>;
status = "disabled";
};
@@ -867,19 +869,32 @@
>;
};
- pinctrl_flexcan1: flexcan1grp {
+ pinctrl_flexcan1_default: flexcan1defgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_7__FLEXCAN1_TX PAD_CTRL_HYS_PU
MX6QDL_PAD_GPIO_8__FLEXCAN1_RX PAD_CTRL_HYS_PU
>;
};
- pinctrl_flexcan2: flexcan2grp {
+ pinctrl_flexcan1_sleep: flexcan1slpgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0
+ MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0
+ >;
+ };
+
+ pinctrl_flexcan2_default: flexcan2defgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX PAD_CTRL_HYS_PU
MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX PAD_CTRL_HYS_PU
>;
};
+ pinctrl_flexcan2_sleep: flexcan2slpgrp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x0
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x0
+ >;
+ };
pinctrl_gpio_bl_on: gpio-bl-on {
fsl,pins = <