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authorPhilip Rakity <prakity@marvell.com>2011-01-07 11:27:46 -0800
committerEric Miao <eric.y.miao@gmail.com>2011-01-15 04:29:20 -0600
commit33e739973defbe6b88a2375f174571bf7e72d8fd (patch)
tree446ee675a4ef7d4084d8b53adaa6c433e0a63feb /arch/arm
parentee309d3d6e60e19e93cde22e49b87c434dc826ba (diff)
ARM: mmp: PXA910 drive strength FAST using wrong value
Drive strength for PXA910 is a 2 bit value but because of the mapping in plat-pxa/mfp.h needs to be shifted up one bit to handle real location in mfp registers. (MMP2 and PXA910 drive strength start at bit 11 while PXA168 starts at bit 10). Values 0, 1, 2, and 3 effectively need to be 0, 2, 4, and 6 to fit into register. 8 does not work. Signed-off-by: Philip Rakity <prakity@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-pxa910.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
index 7e8a80f25ddc..fbd7ee8e4897 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
@@ -6,7 +6,7 @@
#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
#define MFP_DRIVE_SLOW (0x2 << 13)
#define MFP_DRIVE_MEDIUM (0x4 << 13)
-#define MFP_DRIVE_FAST (0x8 << 13)
+#define MFP_DRIVE_FAST (0x6 << 13)
/* UART2 */
#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF6)