diff options
| author | Sumit Bhattacharya <sumitb@nvidia.com> | 2012-01-18 14:20:43 +0530 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2012-01-30 11:48:17 -0800 |
| commit | a2f02480d04deed4ada03b8035159cd8da15efbc (patch) | |
| tree | f08348bd4c8c3f753997f025aaaa83fee4756e51 /arch/arm | |
| parent | da0280659ba3f62d6dcb7b3b2b2f20a9c54c2d0b (diff) | |
ARM: Tegra: clock: Add PERIPH_ON_APB flag to HDA clocks
Bug 896827
Reviewed-on: http://git-master/r/75867
Change-Id: Id37fe5557f6d7993f6df424d0a8d027acb6bd1b4
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77310
Reviewed-by: Automatic_Commit_Validation_User
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_clocks.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/tegra3_clocks.c b/arch/arm/mach-tegra/tegra3_clocks.c index 6ca311beffa1..d1cb8914c6cd 100644 --- a/arch/arm/mach-tegra/tegra3_clocks.c +++ b/arch/arm/mach-tegra/tegra3_clocks.c @@ -4225,9 +4225,9 @@ struct clk tegra_list_clks[] = { PERIPH_CLK("dam0", "tegra30-dam.0", NULL, 108, 0x3d8, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71), PERIPH_CLK("dam1", "tegra30-dam.1", NULL, 109, 0x3dc, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71), PERIPH_CLK("dam2", "tegra30-dam.2", NULL, 110, 0x3e0, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71), - PERIPH_CLK("hda", "tegra30-hda", "hda", 125, 0x428, 108000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("hda2codec_2x", "tegra30-hda", "hda2codec", 111, 0x3e4, 48000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), - PERIPH_CLK("hda2hdmi", "tegra30-hda", "hda2hdmi", 128, 0, 48000000, mux_clk_m, 0), + PERIPH_CLK("hda", "tegra30-hda", "hda", 125, 0x428, 108000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | PERIPH_ON_APB), + PERIPH_CLK("hda2codec_2x", "tegra30-hda", "hda2codec", 111, 0x3e4, 48000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | PERIPH_ON_APB), + PERIPH_CLK("hda2hdmi", "tegra30-hda", "hda2hdmi", 128, 0, 48000000, mux_clk_m, PERIPH_ON_APB), PERIPH_CLK("sbc1", "spi_tegra.0", NULL, 41, 0x134, 160000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("sbc2", "spi_tegra.1", NULL, 44, 0x118, 160000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("sbc3", "spi_tegra.2", NULL, 46, 0x11c, 160000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | PERIPH_ON_APB), |