diff options
| author | Luke Huang <lhuang@nvidia.com> | 2011-07-12 13:05:47 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:47:39 -0800 |
| commit | 37ff98089370ef8b4b077c0ab32791de4d2df690 (patch) | |
| tree | 57eae3698a7afc387ea6b24ec5c53eab15f62287 /arch/arm | |
| parent | b6201f23b3192934a8a4820635b0f71a69ce09ba (diff) | |
arm: tegra: clock: keep pllc on after lp0
pll_c is required to be on after lp0, otherwise there is a chance that
grhost will get stuck and the sync point won't be incremented.
bug 846944
Original-Change-Id: Id73eeafe1587f64d3ec2bee9369732fd3e834003
Reviewed-on: http://git-master/r/40680
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rc03579fa51ff041ab2c929c3e17fa0ab66f5b4e4
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_clocks.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/tegra3_clocks.c b/arch/arm/mach-tegra/tegra3_clocks.c index 72ddca0f91c1..19e535308ec3 100644 --- a/arch/arm/mach-tegra/tegra3_clocks.c +++ b/arch/arm/mach-tegra/tegra3_clocks.c @@ -4459,7 +4459,9 @@ void tegra_clk_resume(void) clk_writel(*ctx++, CLK_MASK_ARM); /* Restore back the actual pllc/a value */ - clk_writel(pllc_base, tegra_pll_c.reg + PLL_BASE); + /* FIXME: need to root cause why pllc is required to be on + * clk_writel(pllc_base, tegra_pll_c.reg + PLL_BASE); + */ clk_writel(plla_base, tegra_pll_a.reg + PLL_BASE); clk_writel(plld_base, tegra_pll_d.reg + PLL_BASE); clk_writel(plld2_base, tegra_pll_d2.reg + PLL_BASE); |