diff options
author | Bai Ping <ping.bai@nxp.com> | 2016-12-13 16:51:59 +0800 |
---|---|---|
committer | Bai Ping <ping.bai@nxp.com> | 2017-02-08 17:45:21 +0800 |
commit | 0772724b5c2980e73a4f2914a8dd88bd1cc6916d (patch) | |
tree | 792a9a2cf5f05e809b21eb8dd2fac0db243cd86d /arch/arm | |
parent | 2e7bffdeaf4ebd33d7f938d7028fb4cc3120442f (diff) |
MLK-13601-01 ARM: dts: imx: update the setpoint for imx6ull
According to the latest datasheet(Rev.0,09/2016), two new setpoints
are added on i.MX6ULL, 996MHz/1.25V and 792MHz/1.2V. these two setpoints
can only be enabled when LDO is enabled. In order to cover IR drop and
board tolerance, we add a 25mV margin to the voltage.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit 48e73a70e9a901bee547975201d7ccebbc7893b6)
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2-ldo.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6ull.dtsi | 4 |
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2-ldo.dts b/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2-ldo.dts index e0dc29bef6fa..735b2efbca35 100644 --- a/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2-ldo.dts +++ b/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2-ldo.dts @@ -11,12 +11,16 @@ &cpu0 { operating-points = < /* kHz uV */ + 996000 1275000 + 792000 1225000 528000 1175000 396000 1025000 198000 950000 >; fsl,soc-operating-points = < /* KHz uV */ + 996000 1175000 + 792000 1175000 528000 1175000 396000 1175000 198000 1175000 diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index d8b6706800ea..ef90ec88cd9b 100644 --- a/arch/arm/boot/dts/imx6ull.dtsi +++ b/arch/arm/boot/dts/imx6ull.dtsi @@ -57,12 +57,16 @@ clock-latency = <61036>; /* two CLK32 periods */ operating-points = < /* kHz uV */ + 996000 1275000 + 792000 1225000 528000 1175000 396000 1025000 198000 950000 >; fsl,soc-operating-points = < /* KHz uV */ + 996000 1175000 + 792000 1175000 528000 1175000 396000 1175000 198000 1175000 |