ARM: dts (ds): imx7: merge changes from toradex_4.9-2.3.x-imx-next

Merge changes from Toradex Linux 4.9 BSP.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>

5 files changed, 560 insertions, 399 deletions

diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index acd023d90e0d..f24730c9a4f2 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -40,6 +40,8 @@
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
+#include <dt-bindings/input/input.h>
+
 / {
 	chosen {
 		stdout-path = "serial0:115200n8";
@@ -52,16 +54,12 @@
 		clock-frequency = <16000000>;
 	};
 
-	panel: panel {
-		compatible = "edt,et057090dhu";
-		backlight = <&bl>;
-		power-supply = <&reg_3v3>;
-
-		port {
-			panel_in: endpoint {
-				remote-endpoint = <&lcdif_out>;
-			};
-		};
+	extcon_usbc_det: usbc_det {
+		compatible = "linux,extcon-usb-gpio";
+		debounce = <25>;
+		id-gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_usbc_det>;
 	};
 	gpio-keys {
 		compatible = "gpio-keys";
@@ -118,6 +116,10 @@
 	status = "okay";
 };
 
+&epxp {
+	status = "okay";
+};
+
 &ecspi3 {
 	status = "okay";
 
@@ -134,6 +136,13 @@
 		xceiver-supply = <&reg_5v0>;
 		status = "okay";
 	};
+
+	spidev0: spidev@0 {
+		compatible = "toradex,evalspi";
+		reg = <0>;
+		spi-max-frequency = <23000000>;
+		status = "disabled";
+	};
 };
 
 &fec1 {
@@ -151,11 +160,119 @@
 };
 
 &lcdif {
+	display = <&display0>;
 	status = "okay";
 
-	port {
-		lcdif_out: endpoint {
-			remote-endpoint = <&panel_in>;
+	display0: lcd-display {
+		bits-per-pixel = <16>;
+		bus-width = <18>;
+
+		display-timings {
+			native-mode = <&timing_vga>;
+
+			/* Standard VGA timing */
+			timing_vga: 640x480 {
+				clock-frequency = <25175000>;
+				hactive = <640>;
+				vactive = <480>;
+				hback-porch = <40>;
+				hfront-porch = <24>;
+				vback-porch = <32>;
+				vfront-porch = <11>;
+				hsync-len = <96>;
+				vsync-len = <2>;
+
+				de-active = <1>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				pixelclk-active = <0>;
+			};
+
+			/* WVGA Timing, e.g. EDT ET070080DH6 */
+			timing_wvga: 800x480 {
+				clock-frequency = <33260000>;
+				hactive = <800>;
+				vactive = <480>;
+				hback-porch = <216>;
+				hfront-porch = <40>;
+				vback-porch = <35>;
+				vfront-porch = <10>;
+				hsync-len = <128>;
+				vsync-len = <2>;
+
+				de-active = <1>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				pixelclk-active = <0>;
+			};
+			/* WVGA Timing, TouchRevolution Fusion 7" */
+			timing_wvga2: 800x480pixclkact {
+				clock-frequency = <33260000>;
+				hactive = <800>;
+				vactive = <480>;
+				hback-porch = <216>;
+				hfront-porch = <40>;
+				vback-porch = <35>;
+				vfront-porch = <10>;
+				hsync-len = <128>;
+				vsync-len = <2>;
+
+				de-active = <1>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				pixelclk-active = <1>;
+			};
+			/* Standard SVGA timing */
+			timing_svga: 800x600 {
+				clock-frequency = <40000000>;
+				hactive = <800>;
+				vactive = <600>;
+				hback-porch = <88>;
+				hfront-porch = <40>;
+				vback-porch = <23>;
+				vfront-porch = <1>;
+				hsync-len = <128>;
+				vsync-len = <4>;
+
+				de-active = <1>;
+				hsync-active = <1>;
+				vsync-active = <1>;
+				pixelclk-active = <0>;
+			};
+			/* TouchRevolution Fusion 10"/CLAA101NC05 10.1 inch */
+			timing_wsvga: 1024x600 {
+				clock-frequency = <48000000>;
+				hactive = <1024>;
+				vactive = <600>;
+				hback-porch = <104>;
+				hfront-porch = <43>;
+				vback-porch = <24>;
+				vfront-porch = <20>;
+				hsync-len = <5>;
+				vsync-len = <5>;
+
+				de-active = <1>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				pixelclk-active = <0>;
+			};
+			/* Standard XGA timing */
+			timing_xga: 1024x768 {
+				clock-frequency = <65000000>;
+				hactive = <1024>;
+				vactive = <768>;
+				hback-porch = <160>;
+				hfront-porch = <24>;
+				vback-porch = <29>;
+				vfront-porch = <3>;
+				hsync-len = <136>;
+				vsync-len = <6>;
+
+				de-active = <1>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				pixelclk-active = <0>;
+			};
 		};
 	};
 };
@@ -189,6 +306,8 @@
 };
 
 &usbotg1 {
+	extcon = <&extcon_usbc_det>, <&extcon_usbc_det>;
+	vbus-supply = <&reg_usbh_vbus>;
 	status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 798db85a5b50..4e3a50f8db64 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -49,6 +49,12 @@
 		enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 	};
 
+	pxp_v4l2_out {
+		compatible = "fsl,imx7d-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", \
+		             "fsl,imx6sl-pxp-v4l2";
+		status = "okay";
+	};
+
 	reg_module_3v3: regulator-module-3v3 {
 		compatible = "regulator-fixed";
 		regulator-name = "+V3.3";
@@ -80,6 +86,11 @@
 			clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
 		};
 	};
+
+	m4_tcm: tcml@007f8000 {
+		compatible = "fsl, m4_tcml";
+		reg = <0x007f8000 0x8000>;
+	};
 };
 
 &adc1 {
@@ -258,6 +269,16 @@
 		     &pinctrl_lcdif_ctrl>;
 };
 
+&ocram {
+	reg = <0x00901000 0xf000>;
+};
+
+&rpmsg {
+	vdev-nums = <1>;
+	reg = <0x8fff0000 0x10000>;
+	status = "okay";
+};
+
 &pwm1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
@@ -652,6 +673,12 @@
 		>;
 	};
 
+	pinctrl_usbc_det: gpio_usbc_det {
+		fsl,pins = <
+			MX7D_PAD_ENET1_CRS__GPIO7_IO14	0x14
+		>;
+	};
+
 	pinctrl_usbh_reg: gpio-usbh-vbus {
 		fsl,pins = <
 			MX7D_PAD_UART3_CTS_B__GPIO4_IO7	0x14 /* SODIMM 129 USBH PEN */
@@ -767,6 +794,12 @@
 		>;
 	};
 
+	pinctrl_gpiokeys: gpiokeysgrp {
+		fsl,pins = <
+			MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1	0x19
+		>;
+	};
+
 	pinctrl_i2c1: i2c1-grp {
 		fsl,pins = <
 			MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA	0x4000007f
diff --git a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
index 92fe9f7a34f6..35bedec5b001 100644
--- a/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
+++ b/arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
@@ -7,6 +7,14 @@
 #include "imx7-colibri.dtsi"
 
 / {
+	aliases {
+		/* the following, together with kernel patches, forces a fixed assignment
+		   between device id and usdhc controller */
+		/* i.e. the eMMC on usdhc3 will be /dev/mmcblk0 */
+		mmc0 = &usdhc3; /* eMMC */
+		mmc1 = &usdhc1; /* MMC 4bit slot */
+	};
+
 	memory {
 		device_type = "memory";
 		reg = <0x80000000 0x40000000>;
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 034629cab258..c7714337f26f 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -101,152 +101,10 @@
 			};
 		};
 
-		busfreq {
-			compatible = "fsl,imx_busfreq";
-			fsl,max_ddr_freq = <533000000>;
-			clocks = <&clks IMX7D_OSC_24M_CLK>, <&clks IMX7D_MAIN_AXI_ROOT_SRC>,
-				<&clks IMX7D_AHB_CHANNEL_ROOT_SRC>, <&clks IMX7D_PLL_SYS_PFD0_392M_CLK>,
-				<&clks IMX7D_DRAM_ROOT_SRC>, <&clks IMX7D_DRAM_ALT_ROOT_SRC>,
-				<&clks IMX7D_PLL_DRAM_MAIN_CLK>, <&clks IMX7D_DRAM_ALT_ROOT_CLK>,
-				<&clks IMX7D_PLL_SYS_PFD2_270M_CLK>, <&clks IMX7D_PLL_SYS_PFD1_332M_CLK>,
-				<&clks IMX7D_AHB_CHANNEL_ROOT_CLK>, <&clks IMX7D_MAIN_AXI_ROOT_DIV>;
-			clock-names = "osc", "axi_sel", "ahb_sel", "pfd0_392m", "dram_root", "dram_alt_sel",
-					"pll_dram", "dram_alt_root", "pfd2_270m", "pfd1_332m", "ahb", "axi";
-			interrupts = <0 112 0x04>, <0 113 0x04>;
-			interrupt-names = "irq_busfreq_0", "irq_busfreq_1";
-		};
-
-		caam_sm: caam-sm@00100000 {
-			 compatible = "fsl,imx7d-caam-sm", "fsl,imx6q-caam-sm";
-			 reg = <0x00100000 0x8000>;
-		};
-
-		irq_sec_vio: caam_secvio {
-			compatible = "fsl,imx7d-caam-secvio", "fsl,imx6q-caam-secvio";
-			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
-			jtag-tamper = "disabled";
-			watchdog-tamper = "enabled";
-			internal-boot-tamper = "enabled";
-			external-pin-tamper = "disabled";
-		};
-
-		pmu {
-			compatible = "arm,cortex-a7-pmu";
-			interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
-			status = "disabled";
-		};
-
-		ocrams_ddr: sram@00900000 {
-			compatible = "fsl,ddr-lpm-sram";
-			reg = <0x00900000 0x1000>;
-			clocks = <&clks IMX7D_OCRAM_CLK>;
-		};
-
-		ocram: sram@901000 {
-			compatible = "mmio-sram";
-			reg = <0x00901000 0x1f000>;
-			clocks = <&clks IMX7D_OCRAM_CLK>;
-		};
-
-		ocrams: sram@00180000 {
-			compatible = "fsl,lpm-sram";
-			reg = <0x00180000 0x8000>;
-			clocks = <&clks IMX7D_OCRAM_S_CLK>;
-			status = "disabled";
-		};
-
-		ocrams_mf: sram-mf@00900000 {
-			compatible = "fsl,mega-fast-sram";
-			reg = <0x00900000 0x20000>;
-			clocks = <&clks IMX7D_OCRAM_CLK>;
-		};
-
-		ocram_optee {
-			compatible = "fsl,optee-lpm-sram";
-			reg = <0x00180000 0x8000>;
-			overw_reg = <&ocrams_ddr 0x00904000 0x1000>,
-					<&ocram 0x00905000 0x1b000>,
-					<&ocrams 0x00900000 0x4000>;
-			overw_clock = <&ocrams &clks IMX7D_OCRAM_CLK>;
-		};
-	};
-};
-
-&aips1 {
-	kpp: kpp@30320000 {
-		compatible = "fsl,imx7d-kpp", "fsl,imx21-kpp";
-		reg = <0x30320000 0x10000>;
-		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&clks IMX7D_CLK_DUMMY>;
-		status = "disabled";
-	};
-
-	mqs: mqs {
-		compatible = "fsl,imx6sx-mqs";
-		gpr = <&gpr>;
-		status = "disabled";
-	};
-
-	ocotp: ocotp-ctrl@30350000 {
-		compatible = "fsl,imx7d-ocotp", "syscon";
-		reg = <0x30350000 0x10000>;
-		clocks = <&clks IMX7D_OCOTP_CLK>;
-		status = "okay";
-	};
-
-	tempmon: tempmon {
-		compatible = "fsl,imx7d-tempmon";
-		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
-		fsl,tempmon =<&anatop>;
-		fsl,tempmon-data = <&ocotp>;
-		clocks = <&clks IMX7D_PLL_SYS_MAIN_CLK>;
-	};
-
-	caam_snvs: caam-snvs@30370000 {
-		compatible = "fsl,imx6q-caam-snvs";
-		reg = <0x30370000 0x10000>;
-	};
-	iomuxc_lpsr_gpr: lpsr-gpr@30270000 {
-		compatible = "fsl,imx7d-lpsr-gpr";
-		reg = <0x30270000 0x10000>;
 	};
 };
 
 &aips2 {
-	flextimer1: flextimer@30640000 {
-		compatible = "fsl,imx7d-flextimer";
-		reg = <0x30640000 0x10000>;
-		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-		status = "disabled";
-	};
-
-	flextimer2: flextimer@30650000 {
-		compatible = "fsl,imx7d-flextimer";
-		reg = <0x30650000 0x10000>;
-		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
-		status = "disabled";
-	};
-
-	system_counter_rd: system-counter-rd@306a0000 {
-		compatible = "fsl,imx7d-system-counter-rd";
-		reg = <0x306a0000 0x10000>;
-		status = "disabled";
-	};
-
-	system_counter_cmp: system-counter-cmp@306b0000 {
-		compatible = "fsl,imx7d-system-counter-cmp";
-		reg = <0x306b0000 0x10000>;
-		status = "disabled";
-	};
-
-	system_counter_ctrl: system-counter-ctrl@306c0000 {
-		compatible = "fsl,imx7d-system-counter-ctrl";
-		reg = <0x306c0000 0x10000>;
-		interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
-			<GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
-		status = "disabled";
-	};
-
 	epdc: epdc@306f0000 {
 		compatible = "fsl,imx7d-epdc";
 		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
@@ -258,56 +116,6 @@
 		status = "disabled";
 	};
 
-	epxp: epxp@30700000 {
-		compatible = "fsl,imx7d-pxp-dma";
-		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
-			<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-		reg = <0x30700000 0x10000>;
-		clocks = <&clks IMX7D_PXP_IPG_CLK>, <&clks IMX7D_PXP_AXI_CLK>;
-		clock-names = "pxp_ipg", "pxp_axi";
-		status = "disabled";
-	};
-
-	csi1: csi@30710000 {
-		compatible = "fsl,imx7d-csi", "fsl,imx6s-csi";
-		reg = <0x30710000 0x10000>;
-		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&clks IMX7D_CLK_DUMMY>,
-			<&clks IMX7D_CSI_MCLK_ROOT_CLK>,
-			<&clks IMX7D_CLK_DUMMY>;
-		clock-names = "disp-axi", "csi_mclk", "disp_dcic";
-		status = "disabled";
-	};
-
-	mipi_csi: mipi-csi@30750000 {
-		compatible = "fsl,imx7d-mipi-csi";
-		reg = <0x30750000 0x10000>;
-		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&clks IMX7D_MIPI_CSI_ROOT_CLK>,
-				<&clks IMX7D_MIPI_DPHY_ROOT_CLK>;
-		clock-names = "mipi_clk", "phy_clk";
-		mipi-phy-supply = <&reg_1p0d>;
-		csis-phy-reset = <&src 0x28 2>;
-		bus-width = <4>;
-		status = "disabled";
-	};
-
-	mipi_dsi: mipi-dsi@30760000 {
-		compatible = "fsl,imx7d-mipi-dsi";
-		reg = <0x30760000 0x10000>;
-		interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&clks IMX7D_MIPI_DSI_ROOT_CLK>,
-			<&clks IMX7D_MIPI_DPHY_ROOT_CLK>;
-		clock-names = "mipi_cfg_clk", "mipi_pllref_clk";
-		mipi-phy-supply = <&reg_1p0d>;
-		status = "disabled";
-	};
-
-	ddrc: ddrc@307a0000 {
-		compatible = "fsl,imx7-ddrc";
-		reg = <0x307a0000 0x10000>;
-	};
-
 	qosc: qosc@307f0000 {
 		compatible = "fsl,imx7d-qosc", "syscon";
 		reg = <0x307f0000 0x4000>;
@@ -401,84 +209,6 @@
 		status = "disabled";
 	};
 
-	crypto: caam@30900000 {
-		compatible = "fsl,imx7d-caam", "fsl,sec-v4.0";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		reg = <0x30900000 0x40000>;
-		ranges = <0 0x30900000 0x40000>;
-		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&clks IMX7D_CAAM_CLK>,
-			<&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
-		clock-names = "ipg", "aclk";
-
-		sec_ctrl: ctrl@0 {
-			/* CAAM Page 0 only accessible */
-			/*	by secure world */
-			compatible = "fsl,sec-v4.0-ctrl";
-			reg = <0x30900000 0x1000>;
-			secure-status = "okay";
-			status = "disabled";
-		};
-
-		sec_jr0: jr0@1000 {
-			 compatible = "fsl,sec-v4.0-job-ring";
-			 reg = <0x1000 0x1000>;
-			 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
-		};
-
-		sec_jr1: jr1@2000 {
-			 compatible = "fsl,sec-v4.0-job-ring";
-			 reg = <0x2000 0x1000>;
-			 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
-		};
-
-		sec_jr2: jr2@3000 {
-			 compatible = "fsl,sec-v4.0-job-ring";
-			 reg = <0x3000 0x1000>;
-			 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
-		};
-	};
-
-	mu: mu@30aa0000 {
-		compatible = "fsl,imx7d-mu", "fsl,imx6sx-mu";
-		reg = <0x30aa0000 0x10000>;
-		interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&clks IMX7D_MU_ROOT_CLK>;
-		clock-names = "mu";
-		status = "okay";
-	};
-
-	rpmsg: rpmsg{
-		compatible = "fsl,imx7d-rpmsg";
-		status = "disabled";
-	};
-
-	sema4: sema4@30ac0000 {
-		compatible = "fsl,imx7d-sema4";
-		reg = <0x30ac0000 0x10000>;
-		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&clks IMX7D_SEMA4_HS_ROOT_CLK>;
-		clock-names = "sema4";
-		status = "okay";
-	};
-
-	sim1: sim@30b90000 {
-		compatible = "fsl,imx7d-sim";
-		reg = <0x30b90000 0x10000>;
-		interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&clks IMX7D_SIM1_ROOT_CLK>;
-		clock-names = "sim";
-		status = "disabled";
-	};
-
-	sim2: sim@30ba0000 {
-		compatible = "fsl,imx7d-sim";
-		reg = <0x30ba0000 0x10000>;
-		interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
-		status = "disabled";
-	};
-
 	qspi1: qspi@30bb0000 {
 		#address-cells = <1>;
 		#size-cells = <0>;
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index a4aada0650a5..48c07f60df20 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -98,6 +98,10 @@
 			clock-frequency = <792000000>;
 			clock-latency = <61036>; /* two CLK32 periods */
 			clocks = <&clks IMX7D_CLK_ARM>;
+			operating-points = <
+				/* KHz	uV */
+				792000	975000
+			>;
 		};
 	};
 
@@ -122,6 +126,76 @@
 		interrupt-parent = <&gpc>;
 		ranges;
 
+		busfreq {
+			compatible = "fsl,imx_busfreq";
+			fsl,max_ddr_freq = <533000000>;
+			clocks = <&clks IMX7D_OSC_24M_CLK>, <&clks IMX7D_MAIN_AXI_ROOT_SRC>,
+				<&clks IMX7D_AHB_CHANNEL_ROOT_SRC>, <&clks IMX7D_PLL_SYS_PFD0_392M_CLK>,
+				<&clks IMX7D_DRAM_ROOT_SRC>, <&clks IMX7D_DRAM_ALT_ROOT_SRC>,
+				<&clks IMX7D_PLL_DRAM_MAIN_CLK>, <&clks IMX7D_DRAM_ALT_ROOT_CLK>,
+				<&clks IMX7D_PLL_SYS_PFD2_270M_CLK>, <&clks IMX7D_PLL_SYS_PFD1_332M_CLK>,
+				<&clks IMX7D_AHB_CHANNEL_ROOT_CLK>, <&clks IMX7D_MAIN_AXI_ROOT_DIV>,
+				<&clks IMX7D_ARM_M4_ROOT_CLK>;
+			clock-names = "osc", "axi_sel", "ahb_sel", "pfd0_392m", "dram_root", "dram_alt_sel",
+					"pll_dram", "dram_alt_root", "pfd2_270m", "pfd1_332m", "ahb", "axi", "m4";
+			interrupts = <0 112 0x04>, <0 113 0x04>;
+			interrupt-names = "irq_busfreq_0", "irq_busfreq_1";
+		};
+
+		caam_sm: caam-sm@00100000 {
+			 compatible = "fsl,imx7d-caam-sm", "fsl,imx6q-caam-sm";
+			 reg = <0x00100000 0x3fff>;
+		};
+
+		irq_sec_vio: caam_secvio {
+			compatible = "fsl,imx7d-caam-secvio", "fsl,imx6q-caam-secvio";
+			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+			jtag-tamper = "disabled";
+			watchdog-tamper = "enabled";
+			internal-boot-tamper = "enabled";
+			external-pin-tamper = "disabled";
+		};
+
+		pmu {
+			compatible = "arm,cortex-a7-pmu";
+			interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		ocrams_ddr: sram@00900000 {
+			compatible = "fsl,ddr-lpm-sram";
+			reg = <0x00900000 0x1000>;
+			clocks = <&clks IMX7D_OCRAM_CLK>;
+		};
+
+		ocram: sram@901000 {
+			compatible = "mmio-sram";
+			reg = <0x00901000 0x1f000>;
+			clocks = <&clks IMX7D_OCRAM_CLK>;
+		};
+
+		ocrams: sram@00180000 {
+			compatible = "fsl,lpm-sram";
+			reg = <0x00180000 0x8000>;
+			clocks = <&clks IMX7D_OCRAM_S_CLK>;
+			status = "disabled";
+		};
+
+		ocrams_mf: sram-mf@00900000 {
+			compatible = "fsl,mega-fast-sram";
+			reg = <0x00900000 0x20000>;
+			clocks = <&clks IMX7D_OCRAM_CLK>;
+		};
+
+		ocram_optee {
+			compatible = "fsl,optee-lpm-sram";
+			reg = <0x00180000 0x8000>;
+			overw_reg = <&ocrams_ddr 0x00904000 0x1000>,
+					<&ocram 0x00905000 0x1b000>,
+					<&ocrams 0x00900000 0x4000>;
+			overw_clock = <&ocrams &clks IMX7D_OCRAM_CLK>;
+		};
+
 		funnel@30041000 {
 			compatible = "arm,coresight-funnel", "arm,primecell";
 			reg = <0x30041000 0x1000>;
@@ -410,6 +484,11 @@
 				gpio-ranges = <&iomuxc 0 139 16>;
 			};
 
+			iomuxc_lpsr_gpr: lpsr-gpr@30270000 {
+				compatible = "fsl,imx7d-lpsr-gpr";
+				reg = <0x30270000 0x10000>;
+			};
+
 			wdog1: wdog@30280000 {
 				compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
 				reg = <0x30280000 0x10000>;
@@ -487,6 +566,20 @@
 				status = "disabled";
 			};
 
+			kpp: kpp@30320000 {
+				compatible = "fsl,imx7d-kpp", "fsl,imx21-kpp";
+				reg = <0x30320000 0x10000>;
+				interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX7D_KPP_ROOT_CLK>;
+				status = "disabled";
+			};
+
+			mqs: mqs {
+				compatible = "fsl,imx6sx-mqs";
+				gpr = <&gpr>;
+				status = "disabled";
+			};
+
 			iomuxc: iomuxc@30330000 {
 				compatible = "fsl,imx7d-iomuxc";
 				reg = <0x30330000 0x10000>;
@@ -502,6 +595,15 @@
 				compatible = "fsl,imx7d-ocotp", "syscon";
 				reg = <0x30350000 0x10000>;
 				clocks = <&clks IMX7D_OCOTP_CLK>;
+				status = "okay";
+			};
+
+			tempmon: tempmon {
+				compatible = "fsl,imx7d-tempmon";
+				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+				fsl,tempmon =<&anatop>;
+				fsl,tempmon-data = <&ocotp>;
+				clocks = <&clks IMX7D_PLL_SYS_MAIN_CLK>;
 			};
 
 			anatop: anatop@30360000 {
@@ -557,7 +659,6 @@
 					compatible = "syscon-poweroff";
 					regmap = <&snvs>;
 					offset = <0x38>;
-					value = <0x61>;
 					mask = <0x61>;
 				};
 
@@ -652,6 +753,20 @@
 				status = "disabled";
 			};
 
+			flextimer1: flextimer@30640000 {
+				compatible = "fsl,imx7d-flextimer";
+				reg = <0x30640000 0x10000>;
+				interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+
+			flextimer2: flextimer@30650000 {
+				compatible = "fsl,imx7d-flextimer";
+				reg = <0x30650000 0x10000>;
+				interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+
 			pwm1: pwm@30660000 {
 				compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
 				reg = <0x30660000 0x10000>;
@@ -696,6 +811,47 @@
 				status = "disabled";
 			};
 
+			system_counter_rd: system-counter-rd@306a0000 {
+				compatible = "fsl,imx7d-system-counter-rd";
+				reg = <0x306a0000 0x10000>;
+				status = "disabled";
+			};
+
+			system_counter_cmp: system-counter-cmp@306b0000 {
+				compatible = "fsl,imx7d-system-counter-cmp";
+				reg = <0x306b0000 0x10000>;
+				status = "disabled";
+			};
+
+			system_counter_ctrl: system-counter-ctrl@306c0000 {
+				compatible = "fsl,imx7d-system-counter-ctrl";
+				reg = <0x306c0000 0x10000>;
+				interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+					<GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+
+			epxp: epxp@30700000 {
+				compatible = "fsl,imx7d-pxp-dma";
+				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+					<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+				reg = <0x30700000 0x10000>;
+				clocks = <&clks IMX7D_PXP_IPG_CLK>, <&clks IMX7D_PXP_AXI_CLK>;
+				clock-names = "pxp_ipg", "pxp_axi";
+				status = "disabled";
+			};
+
+			csi1: csi@30710000 {
+				compatible = "fsl,imx7d-csi", "fsl,imx6s-csi";
+				reg = <0x30710000 0x10000>;
+				interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX7D_CLK_DUMMY>,
+					<&clks IMX7D_CSI_MCLK_ROOT_CLK>,
+					<&clks IMX7D_CLK_DUMMY>;
+				clock-names = "disp-axi", "csi_mclk", "disp_dcic";
+				status = "disabled";
+			};
+
 			lcdif: lcdif@30730000 {
 				compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif";
 				reg = <0x30730000 0x10000>;
@@ -706,6 +862,35 @@
 				clock-names = "pix", "axi", "disp_axi";
 				status = "disabled";
 			};
+
+			mipi_csi: mipi-csi@30750000 {
+				compatible = "fsl,imx7d-mipi-csi";
+				reg = <0x30750000 0x10000>;
+				interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX7D_MIPI_CSI_ROOT_CLK>,
+						<&clks IMX7D_MIPI_DPHY_ROOT_CLK>;
+				clock-names = "mipi_clk", "phy_clk";
+				mipi-phy-supply = <&reg_1p0d>;
+				csis-phy-reset = <&src 0x28 2>;
+				bus-width = <4>;
+				status = "disabled";
+			};
+
+			mipi_dsi: mipi-dsi@30760000 {
+				compatible = "fsl,imx7d-mipi-dsi";
+				reg = <0x30760000 0x10000>;
+				interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX7D_MIPI_DSI_ROOT_CLK>,
+					<&clks IMX7D_MIPI_DPHY_ROOT_CLK>;
+				clock-names = "mipi_cfg_clk", "mipi_pllref_clk";
+				mipi-phy-supply = <&reg_1p0d>;
+				status = "disabled";
+			};
+
+			ddrc: ddrc@307a0000 {
+				compatible = "fsl,imx7-ddrc";
+				reg = <0x307a0000 0x10000>;
+			};
 		};
 
 		aips3: aips-bus@30800000 {
@@ -715,131 +900,178 @@
 			reg = <0x30800000 0x400000>;
 			ranges;
 
-			ecspi1: ecspi@30820000 {
+			spba-bus@30800000 {
+				compatible = "fsl,spba-bus", "simple-bus";
 				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
-				reg = <0x30820000 0x10000>;
-				interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks IMX7D_ECSPI1_ROOT_CLK>,
-					<&clks IMX7D_ECSPI1_ROOT_CLK>;
-				clock-names = "ipg", "per";
-				dmas = <&sdma 0 7 1>, <&sdma 1 7 2>;
-				dma-names = "rx", "tx";
-				status = "disabled";
-			};
+				#size-cells = <1>;
+				reg = <0x30800000 0x100000>;
+				ranges;
 
-			ecspi2: ecspi@30830000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
-				reg = <0x30830000 0x10000>;
-				interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks IMX7D_ECSPI2_ROOT_CLK>,
-					<&clks IMX7D_ECSPI2_ROOT_CLK>;
-				clock-names = "ipg", "per";
-				dmas = <&sdma 2 7 1>, <&sdma 3 7 2>;
-				dma-names = "rx", "tx";
-				status = "disabled";
-			};
+				ecspi1: ecspi@30820000 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
+					reg = <0x30820000 0x10000>;
+					interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clks IMX7D_ECSPI1_ROOT_CLK>,
+						<&clks IMX7D_ECSPI1_ROOT_CLK>;
+					clock-names = "ipg", "per";
+					dmas = <&sdma 0 7 1>, <&sdma 1 7 2>;
+					dma-names = "rx", "tx";
+					status = "disabled";
+				};
 
-			ecspi3: ecspi@30840000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
-				reg = <0x30840000 0x10000>;
-				interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks IMX7D_ECSPI3_ROOT_CLK>,
-					<&clks IMX7D_ECSPI3_ROOT_CLK>;
-				clock-names = "ipg", "per";
-				dmas = <&sdma 4 7 1>, <&sdma 5 7 2>;
-				dma-names = "rx", "tx";
-				status = "disabled";
-			};
+				ecspi2: ecspi@30830000 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
+					reg = <0x30830000 0x10000>;
+					interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clks IMX7D_ECSPI2_ROOT_CLK>,
+						<&clks IMX7D_ECSPI2_ROOT_CLK>;
+					clock-names = "ipg", "per";
+					dmas = <&sdma 2 7 1>, <&sdma 3 7 2>;
+					dma-names = "rx", "tx";
+					status = "disabled";
+				};
 
-			uart1: serial@30860000 {
-				compatible = "fsl,imx7d-uart",
-					     "fsl,imx6q-uart";
-				reg = <0x30860000 0x10000>;
-				interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks IMX7D_UART1_ROOT_CLK>,
-					<&clks IMX7D_UART1_ROOT_CLK>;
-				clock-names = "ipg", "per";
-				status = "disabled";
-			};
+				ecspi3: ecspi@30840000 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
+					reg = <0x30840000 0x10000>;
+					interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clks IMX7D_ECSPI3_ROOT_CLK>,
+						<&clks IMX7D_ECSPI3_ROOT_CLK>;
+					clock-names = "ipg", "per";
+					dmas = <&sdma 4 7 1>, <&sdma 5 7 2>;
+					dma-names = "rx", "tx";
+					status = "disabled";
+				};
 
-			uart2: serial@30890000 {
-				compatible = "fsl,imx7d-uart",
-					     "fsl,imx6q-uart";
-				reg = <0x30890000 0x10000>;
-				interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks IMX7D_UART2_ROOT_CLK>,
-					<&clks IMX7D_UART2_ROOT_CLK>;
-				clock-names = "ipg", "per";
-				dmas = <&sdma 24 4 0>, <&sdma 25 4 0>;
-				dma-names = "rx", "tx";
-				status = "disabled";
-			};
+				uart1: serial@30860000 {
+					compatible = "fsl,imx7d-uart",
+						     "fsl,imx6q-uart";
+					reg = <0x30860000 0x10000>;
+					interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clks IMX7D_UART1_ROOT_CLK>,
+						<&clks IMX7D_UART1_ROOT_CLK>;
+					clock-names = "ipg", "per";
+					status = "disabled";
+				};
 
-			uart3: serial@30880000 {
-				compatible = "fsl,imx7d-uart",
-					     "fsl,imx6q-uart";
-				reg = <0x30880000 0x10000>;
-				interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks IMX7D_UART3_ROOT_CLK>,
-					<&clks IMX7D_UART3_ROOT_CLK>;
-				clock-names = "ipg", "per";
-				dmas = <&sdma 26 4 0>, <&sdma 27 4 0>;
-				dma-names = "rx", "tx";
-				status = "disabled";
-			};
+				uart2: serial@30890000 {
+					compatible = "fsl,imx7d-uart",
+						     "fsl,imx6q-uart";
+					reg = <0x30890000 0x10000>;
+					interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clks IMX7D_UART2_ROOT_CLK>,
+						<&clks IMX7D_UART2_ROOT_CLK>;
+					clock-names = "ipg", "per";
+					dmas = <&sdma 24 4 0>, <&sdma 25 4 0>;
+					dma-names = "rx", "tx";
+					status = "disabled";
+				};
 
-			sai1: sai@308a0000 {
-				#sound-dai-cells = <0>;
-				compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
-				reg = <0x308a0000 0x10000>;
-				interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks IMX7D_SAI1_IPG_CLK>,
-					 <&clks IMX7D_CLK_DUMMY>,
-					 <&clks IMX7D_SAI1_ROOT_CLK>,
-					 <&clks IMX7D_CLK_DUMMY>,
-					 <&clks IMX7D_CLK_DUMMY>;
-				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
-				dma-names = "rx", "tx";
-				dmas = <&sdma 8 24 0>, <&sdma 9 24 0>;
-				status = "disabled";
-			};
+				uart3: serial@30880000 {
+					compatible = "fsl,imx7d-uart",
+						     "fsl,imx6q-uart";
+					reg = <0x30880000 0x10000>;
+					interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clks IMX7D_UART3_ROOT_CLK>,
+						<&clks IMX7D_UART3_ROOT_CLK>;
+					clock-names = "ipg", "per";
+					dmas = <&sdma 26 4 0>, <&sdma 27 4 0>;
+					dma-names = "rx", "tx";
+					status = "disabled";
+				};
 
-			sai2: sai@308b0000 {
-				#sound-dai-cells = <0>;
-				compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
-				reg = <0x308b0000 0x10000>;
-				interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks IMX7D_SAI2_IPG_CLK>,
-					 <&clks IMX7D_CLK_DUMMY>,
-					 <&clks IMX7D_SAI2_ROOT_CLK>,
-					 <&clks IMX7D_CLK_DUMMY>,
-					 <&clks IMX7D_CLK_DUMMY>;
-				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
-				dma-names = "rx", "tx";
-				dmas = <&sdma 10 24 0>, <&sdma 11 24 0>;
-				status = "disabled";
+				sai1: sai@308a0000 {
+					#sound-dai-cells = <0>;
+					compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
+					reg = <0x308a0000 0x10000>;
+					interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clks IMX7D_SAI1_IPG_CLK>,
+						 <&clks IMX7D_CLK_DUMMY>,
+						 <&clks IMX7D_SAI1_ROOT_CLK>,
+						 <&clks IMX7D_CLK_DUMMY>,
+						 <&clks IMX7D_CLK_DUMMY>;
+					clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+					dma-names = "rx", "tx";
+					dmas = <&sdma 8 24 0>, <&sdma 9 24 0>;
+					status = "disabled";
+				};
+
+				sai2: sai@308b0000 {
+					#sound-dai-cells = <0>;
+					compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
+					reg = <0x308b0000 0x10000>;
+					interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clks IMX7D_SAI2_IPG_CLK>,
+						 <&clks IMX7D_CLK_DUMMY>,
+						 <&clks IMX7D_SAI2_ROOT_CLK>,
+						 <&clks IMX7D_CLK_DUMMY>,
+						 <&clks IMX7D_CLK_DUMMY>;
+					clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+					dma-names = "rx", "tx";
+					dmas = <&sdma 10 24 0>, <&sdma 11 24 0>;
+					status = "disabled";
+				};
+
+				sai3: sai@308c0000 {
+					#sound-dai-cells = <0>;
+					compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
+					reg = <0x308c0000 0x10000>;
+					interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+					clocks = <&clks IMX7D_SAI3_IPG_CLK>,
+						 <&clks IMX7D_CLK_DUMMY>,
+						 <&clks IMX7D_SAI3_ROOT_CLK>,
+						 <&clks IMX7D_CLK_DUMMY>,
+						 <&clks IMX7D_CLK_DUMMY>;
+					clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+					dma-names = "rx", "tx";
+					dmas = <&sdma 12 24 0>, <&sdma 13 24 0>;
+					status = "disabled";
+				};
 			};
 
-			sai3: sai@308c0000 {
-				#sound-dai-cells = <0>;
-				compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
-				reg = <0x308c0000 0x10000>;
-				interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clks IMX7D_SAI3_IPG_CLK>,
-					 <&clks IMX7D_CLK_DUMMY>,
-					 <&clks IMX7D_SAI3_ROOT_CLK>,
-					 <&clks IMX7D_CLK_DUMMY>,
-					 <&clks IMX7D_CLK_DUMMY>;
-				clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
-				dma-names = "rx", "tx";
-				dmas = <&sdma 12 24 0>, <&sdma 13 24 0>;
-				status = "disabled";
+			crypto: caam@30900000 {
+				compatible = "fsl,imx7d-caam", "fsl,sec-v4.0";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0x30900000 0x40000>;
+				ranges = <0 0x30900000 0x40000>;
+				interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX7D_CAAM_CLK>,
+					<&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
+				clock-names = "ipg", "aclk";
+
+				sec_ctrl: ctrl@0 {
+					/* CAAM Page 0 only accessible */
+					/*	by secure world */
+					compatible = "fsl,sec-v4.0-ctrl";
+					reg = <0x30900000 0x1000>;
+					secure-status = "okay";
+					status = "disabled";
+				};
+
+				sec_jr0: jr0@1000 {
+					 compatible = "fsl,sec-v4.0-job-ring";
+					 reg = <0x1000 0x1000>;
+					 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				sec_jr1: jr1@2000 {
+					 compatible = "fsl,sec-v4.0-job-ring";
+					 reg = <0x2000 0x1000>;
+					 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				sec_jr2: jr2@3000 {
+					 compatible = "fsl,sec-v4.0-job-ring";
+					 reg = <0x3000 0x1000>;
+					 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+				};
 			};
 
 			flexcan1: can@30a00000 {
@@ -956,6 +1188,29 @@
 				status = "disabled";
 			};
 
+			mu: mu@30aa0000 {
+				compatible = "fsl,imx7d-mu", "fsl,imx6sx-mu";
+				reg = <0x30aa0000 0x10000>;
+				interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX7D_MU_ROOT_CLK>;
+				clock-names = "mu";
+				status = "okay";
+			};
+
+			rpmsg: rpmsg{
+				compatible = "fsl,imx7d-rpmsg";
+				status = "disabled";
+			};
+
+			sema4: sema4@30ac0000 {
+				compatible = "fsl,imx7d-sema4";
+				reg = <0x30ac0000 0x10000>;
+				interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX7D_SEMA4_HS_ROOT_CLK>;
+				clock-names = "sema4";
+				status = "okay";
+			};
+
 			usbotg1: usb@30b10000 {
 				compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
 				reg = <0x30b10000 0x200>;
@@ -1049,6 +1304,22 @@
 				status = "disabled";
 			};
 
+			sim1: sim@30b90000 {
+				compatible = "fsl,imx7d-sim";
+				reg = <0x30b90000 0x10000>;
+				interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX7D_SIM1_ROOT_CLK>;
+				clock-names = "sim";
+				status = "disabled";
+			};
+
+			sim2: sim@30ba0000 {
+				compatible = "fsl,imx7d-sim";
+				reg = <0x30ba0000 0x10000>;
+				interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+
 			sdma: sdma@30bd0000 {
 				compatible = "fsl,imx7d-sdma", "fsl,imx35-sdma";
 				reg = <0x30bd0000 0x10000>;