Initial whistler panel support

Change-Id: I39d19f408d8ecfff67b132a5d22884c541dd54cd
Reviewed-on: http://git-master/r/12347
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

1 files changed, 125 insertions, 3 deletions

diff --git a/arch/arm/mach-tegra/board-whistler-panel.c b/arch/arm/mach-tegra/board-whistler-panel.c
index d6493f6bc27e..8aa46ef86185 100644
--- a/arch/arm/mach-tegra/board-whistler-panel.c
+++ b/arch/arm/mach-tegra/board-whistler-panel.c
@@ -18,12 +18,47 @@
  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  */
 
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/regulator/consumer.h>
+#include <linux/resource.h>
+#include <asm/mach-types.h>
+#include <linux/platform_device.h>
+#include <linux/pwm_backlight.h>
+#include <mach/nvhost.h>
+#include <mach/nvmap.h>
+#include <mach/irqs.h>
+#include <mach/iomap.h>
 #include <mach/dc.h>
 #include <mach/fb.h>
 
+#include "devices.h"
+#include "gpio-names.h"
+
+static struct resource whistler_disp1_resources[] = {
+	{
+		.name	= "irq",
+		.start	= INT_DISPLAY_GENERAL,
+		.end	= INT_DISPLAY_GENERAL,
+		.flags	= IORESOURCE_IRQ,
+	},
+	{
+		.name	= "regs",
+		.start	= TEGRA_DISPLAY_BASE,
+		.end	= TEGRA_DISPLAY_BASE + TEGRA_DISPLAY_SIZE-1,
+		.flags	= IORESOURCE_MEM,
+	},
+	{
+		.name	= "fbmem",
+		.start	= 0x18012000,
+		.end	= 0x18414000 - 1, /* enough for 1080P 16bpp */
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
 static struct tegra_dc_mode whistler_panel_modes[] = {
 	{
-		.pclk = 216000000,
+		.pclk = 27000000,
 		.h_ref_to_sync = 4,
 		.v_ref_to_sync = 2,
 		.h_sync_width = 10,
@@ -37,15 +72,102 @@ static struct tegra_dc_mode whistler_panel_modes[] = {
 	},
 };
 
+static struct tegra_dc_out_pin whistler_dc_out_pins[] = {
+	{
+		.name	= TEGRA_DC_OUT_PIN_H_SYNC,
+		.pol	= TEGRA_DC_OUT_PIN_POL_LOW,
+	},
+	{
+		.name	= TEGRA_DC_OUT_PIN_V_SYNC,
+		.pol	= TEGRA_DC_OUT_PIN_POL_LOW,
+	},
+	{
+		.name	= TEGRA_DC_OUT_PIN_PIXEL_CLOCK,
+		.pol	= TEGRA_DC_OUT_PIN_POL_LOW,
+	},
+};
+
+static struct tegra_dc_out whistler_disp1_out = {
+	.type		= TEGRA_DC_OUT_RGB,
+
+	.align		= TEGRA_DC_ALIGN_MSB,
+	.order		= TEGRA_DC_ORDER_RED_BLUE,
+
+	.modes	 	= whistler_panel_modes,
+	.n_modes 	= ARRAY_SIZE(whistler_panel_modes),
+
+	.out_pins	= whistler_dc_out_pins,
+	.n_out_pins	= ARRAY_SIZE(whistler_dc_out_pins),
+};
+
 static struct tegra_fb_data whistler_fb_data = {
 	.win		= 0,
 	.xres		= 800,
 	.yres		= 480,
-	.bits_per_pixel	= 16,
+	.bits_per_pixel	= 32,
+};
+
+static struct tegra_dc_platform_data whistler_disp1_pdata = {
+	.flags		= TEGRA_DC_FLAG_ENABLED,
+	.default_out	= &whistler_disp1_out,
+	.fb		= &whistler_fb_data,
+};
+
+static struct nvhost_device whistler_disp1_device = {
+	.name		= "tegradc",
+	.id		= 0,
+	.resource	= whistler_disp1_resources,
+	.num_resources	= ARRAY_SIZE(whistler_disp1_resources),
+	.dev = {
+		.platform_data = &whistler_disp1_pdata,
+	},
+};
+
+static struct nvmap_platform_carveout whistler_carveouts[] = {
+	[0] = {
+		.name		= "iram",
+		.usage_mask	= NVMAP_HEAP_CARVEOUT_IRAM,
+		.base		= TEGRA_IRAM_BASE,
+		.size		= TEGRA_IRAM_SIZE,
+		.buddy_size	= 0, /* no buddy allocation for IRAM */
+	},
+	[1] = {
+		.name		= "generic-0",
+		.usage_mask	= NVMAP_HEAP_CARVEOUT_GENERIC,
+		.base		= 0x18C00000,
+		.size		= SZ_128M - 0xC00000,
+		.buddy_size	= SZ_32K,
+	},
+};
+
+static struct nvmap_platform_data whistler_nvmap_data = {
+	.carveouts	= whistler_carveouts,
+	.nr_carveouts	= ARRAY_SIZE(whistler_carveouts),
+};
+
+static struct platform_device whistler_nvmap_device = {
+	.name	= "tegra-nvmap",
+	.id	= -1,
+	.dev	= {
+		.platform_data = &whistler_nvmap_data,
+	},
+};
+
+static struct platform_device *whistler_gfx_devices[] __initdata = {
+	&whistler_nvmap_device,
+	&tegra_grhost_device,
 };
 
 int __init whistler_panel_init(void)
 {
-	return 0;
+	int err;
+
+	err = platform_add_devices(whistler_gfx_devices,
+				   ARRAY_SIZE(whistler_gfx_devices));
+
+	if (!err)
+		err = nvhost_device_register(&whistler_disp1_device);
+
+	return err;
 }