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authorHaavard Skinnemoen <hskinnemoen@atmel.com>2006-10-24 10:12:45 +0200
committerLinus Torvalds <torvalds@g5.osdl.org>2006-10-25 20:26:33 -0700
commit452976b29864f9adcdd6d4ea81001aa5483592c2 (patch)
treed1e8843144929c658a8d74342d0c2a5dd3e0d504 /arch/avr32
parentd68041cc9fde550fe6b6a6de1d7a110daff3cb60 (diff)
[PATCH] AVR32: Use __raw MMIO access for internal peripherals
The read[bwl] and write[bwl] functions are meant for accessing PCI devices. How this is achieved on AVR32 is unknown, as there are no systems with a PCI bridge available yet. On-chip peripheral access, however, should not depend on how we end up implementing PCI access, so using __raw_read[bwl]/__raw_write[bwl] is the right thing to do for on-chip peripherals. This patch converts the drivers for the static memory controller, interrupt controller, PIO controller and system manager to use __raw MMIO access. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/avr32')
-rw-r--r--arch/avr32/mach-at32ap/hsmc.h4
-rw-r--r--arch/avr32/mach-at32ap/intc.h6
-rw-r--r--arch/avr32/mach-at32ap/pio.h6
-rw-r--r--arch/avr32/mach-at32ap/sm.h6
4 files changed, 14 insertions, 8 deletions
diff --git a/arch/avr32/mach-at32ap/hsmc.h b/arch/avr32/mach-at32ap/hsmc.h
index 5681276fafdb..d1d48e26e393 100644
--- a/arch/avr32/mach-at32ap/hsmc.h
+++ b/arch/avr32/mach-at32ap/hsmc.h
@@ -120,8 +120,8 @@
/* Register access macros */
#define hsmc_readl(port,reg) \
- readl((port)->regs + HSMC_##reg)
+ __raw_readl((port)->regs + HSMC_##reg)
#define hsmc_writel(port,reg,value) \
- writel((value), (port)->regs + HSMC_##reg)
+ __raw_writel((value), (port)->regs + HSMC_##reg)
#endif /* __ASM_AVR32_HSMC_H__ */
diff --git a/arch/avr32/mach-at32ap/intc.h b/arch/avr32/mach-at32ap/intc.h
index d289ca2fff13..4d3664e43a8e 100644
--- a/arch/avr32/mach-at32ap/intc.h
+++ b/arch/avr32/mach-at32ap/intc.h
@@ -321,7 +321,9 @@
#define INTC_MKBF(name, value) (((value) & ((1 << INTC_##name##_SIZE) - 1)) << INTC_##name##_OFFSET)
#define INTC_GETBF(name, value) (((value) >> INTC_##name##_OFFSET) & ((1 << INTC_##name##_SIZE) - 1))
-#define intc_readl(port,reg) readl((port)->regs + INTC_##reg)
-#define intc_writel(port,reg,value) writel((value), (port)->regs + INTC_##reg)
+#define intc_readl(port,reg) \
+ __raw_readl((port)->regs + INTC_##reg)
+#define intc_writel(port,reg,value) \
+ __raw_writel((value), (port)->regs + INTC_##reg)
#endif /* __ASM_AVR32_PERIHP_INTC_H__ */
diff --git a/arch/avr32/mach-at32ap/pio.h b/arch/avr32/mach-at32ap/pio.h
index cfea12351599..50fa3aca32c5 100644
--- a/arch/avr32/mach-at32ap/pio.h
+++ b/arch/avr32/mach-at32ap/pio.h
@@ -170,8 +170,10 @@
#define PIO_BFINS(name,value,old) (((old) & ~(((1 << PIO_##name##_SIZE) - 1) << PIO_##name##_OFFSET)) | PIO_BF(name,value))
/* Register access macros */
-#define pio_readl(port,reg) readl((port)->regs + PIO_##reg)
-#define pio_writel(port,reg,value) writel((value), (port)->regs + PIO_##reg)
+#define pio_readl(port,reg) \
+ __raw_readl((port)->regs + PIO_##reg)
+#define pio_writel(port,reg,value) \
+ __raw_writel((value), (port)->regs + PIO_##reg)
void at32_init_pio(struct platform_device *pdev);
diff --git a/arch/avr32/mach-at32ap/sm.h b/arch/avr32/mach-at32ap/sm.h
index 27565822ae2a..cad02b512bcb 100644
--- a/arch/avr32/mach-at32ap/sm.h
+++ b/arch/avr32/mach-at32ap/sm.h
@@ -234,7 +234,9 @@
#define SM_BFINS(name,value,old) (((old) & ~(((1 << SM_##name##_SIZE) - 1) << SM_##name##_OFFSET)) | SM_BF(name,value))
/* Register access macros */
-#define sm_readl(port,reg) readl((port)->regs + SM_##reg)
-#define sm_writel(port,reg,value) writel((value), (port)->regs + SM_##reg)
+#define sm_readl(port,reg) \
+ __raw_readl((port)->regs + SM_##reg)
+#define sm_writel(port,reg,value) \
+ __raw_writel((value), (port)->regs + SM_##reg)
#endif /* __ASM_AVR32_SM_H__ */