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authorIngo Molnar <mingo@elte.hu>2008-06-16 11:28:04 +0200
committerIngo Molnar <mingo@elte.hu>2008-06-16 11:28:04 +0200
commit7aaaec38fcd9ef3172e69f8c19f20113830a8498 (patch)
treeb12a1c359ad53ae10601f77b3438bb27c3c8f337 /arch/blackfin/lib/outs.S
parent1ac97018169c5a13feaa90d9671f2d6ba2d9e86e (diff)
parent066519068ad2fbe98c7f45552b1f592903a9c8c8 (diff)
Merge branch 'linus' into x86/kconfigtip-x86-kconfig-2008-06-16_09.28_Mon
Diffstat (limited to 'arch/blackfin/lib/outs.S')
-rw-r--r--arch/blackfin/lib/outs.S16
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/blackfin/lib/outs.S b/arch/blackfin/lib/outs.S
index 4c3da8ae094e..4685b7aa0080 100644
--- a/arch/blackfin/lib/outs.S
+++ b/arch/blackfin/lib/outs.S
@@ -7,7 +7,7 @@
* Description: Implementation of outs{bwl} for BlackFin processors using zero overhead loops.
*
* Modified: Copyright (C) 2005 Bas Vermeulen, BuyWays BV <bas@buyways.nl>
- * Copyright 2004-2006 Analog Devices Inc.
+ * Copyright 2004-2008 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
@@ -63,3 +63,17 @@ ENTRY(_outsb)
.Lbyte_loop_e: B[P0] = R0;
RTS;
ENDPROC(_outsb)
+
+ENTRY(_outsw_8)
+ P0 = R0; /* P0 = port */
+ P1 = R1; /* P1 = address */
+ P2 = R2; /* P2 = count */
+
+ LSETUP( .Lword8_loop_s, .Lword8_loop_e) LC0 = P2;
+.Lword8_loop_s: R1 = B[P1++];
+ R0 = B[P1++];
+ R0 = R0 << 8;
+ R0 = R0 + R1;
+.Lword8_loop_e: W[P0] = R0;
+ RTS;
+ENDPROC(_outsw_8)