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authorBob Liu <lliubbo@gmail.com>2010-09-29 03:12:44 +0000
committerMike Frysinger <vapier@gentoo.org>2010-10-22 16:29:58 -0400
commitc5b77b450a067cd09031caaee72b671810a0fd25 (patch)
treef5db8cfa45dcbe0e76353219de6ac6f9ba06c2db /arch/blackfin/mach-bf527
parente5c1721894415d00a55c2650ed6536b644799c50 (diff)
Blackfin: bf51x/bf52x: fix 16/32bit SPORT MMR helpers
The RX/TX address is always the same regardless of the size of the access. That means there is no dedicated "16bit" or "32bit" MMR. Trying to use these currently leads to compile errors. So change everything to use the right MMR define. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf527')
-rw-r--r--arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h32
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h b/arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h
index 11fb27bc427d..3048b52bf46a 100644
--- a/arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h
+++ b/arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h
@@ -279,14 +279,14 @@
#define bfin_write_SPORT0_TX(val) bfin_write32(SPORT0_TX, val)
#define bfin_read_SPORT0_RX() bfin_read32(SPORT0_RX)
#define bfin_write_SPORT0_RX(val) bfin_write32(SPORT0_RX, val)
-#define bfin_read_SPORT0_TX32() bfin_read32(SPORT0_TX32)
-#define bfin_write_SPORT0_TX32(val) bfin_write32(SPORT0_TX32, val)
-#define bfin_read_SPORT0_RX32() bfin_read32(SPORT0_RX32)
-#define bfin_write_SPORT0_RX32(val) bfin_write32(SPORT0_RX32, val)
-#define bfin_read_SPORT0_TX16() bfin_read16(SPORT0_TX16)
-#define bfin_write_SPORT0_TX16(val) bfin_write16(SPORT0_TX16, val)
-#define bfin_read_SPORT0_RX16() bfin_read16(SPORT0_RX16)
-#define bfin_write_SPORT0_RX16(val) bfin_write16(SPORT0_RX16, val)
+#define bfin_read_SPORT0_TX32() bfin_read32(SPORT0_TX)
+#define bfin_write_SPORT0_TX32(val) bfin_write32(SPORT0_TX, val)
+#define bfin_read_SPORT0_RX32() bfin_read32(SPORT0_RX)
+#define bfin_write_SPORT0_RX32(val) bfin_write32(SPORT0_RX, val)
+#define bfin_read_SPORT0_TX16() bfin_read16(SPORT0_TX)
+#define bfin_write_SPORT0_TX16(val) bfin_write16(SPORT0_TX, val)
+#define bfin_read_SPORT0_RX16() bfin_read16(SPORT0_RX)
+#define bfin_write_SPORT0_RX16(val) bfin_write16(SPORT0_RX, val)
#define bfin_read_SPORT0_RCR1() bfin_read16(SPORT0_RCR1)
#define bfin_write_SPORT0_RCR1(val) bfin_write16(SPORT0_RCR1, val)
#define bfin_read_SPORT0_RCR2() bfin_read16(SPORT0_RCR2)
@@ -334,14 +334,14 @@
#define bfin_write_SPORT1_TX(val) bfin_write32(SPORT1_TX, val)
#define bfin_read_SPORT1_RX() bfin_read32(SPORT1_RX)
#define bfin_write_SPORT1_RX(val) bfin_write32(SPORT1_RX, val)
-#define bfin_read_SPORT1_TX32() bfin_read32(SPORT1_TX32)
-#define bfin_write_SPORT1_TX32(val) bfin_write32(SPORT1_TX32, val)
-#define bfin_read_SPORT1_RX32() bfin_read32(SPORT1_RX32)
-#define bfin_write_SPORT1_RX32(val) bfin_write32(SPORT1_RX32, val)
-#define bfin_read_SPORT1_TX16() bfin_read16(SPORT1_TX16)
-#define bfin_write_SPORT1_TX16(val) bfin_write16(SPORT1_TX16, val)
-#define bfin_read_SPORT1_RX16() bfin_read16(SPORT1_RX16)
-#define bfin_write_SPORT1_RX16(val) bfin_write16(SPORT1_RX16, val)
+#define bfin_read_SPORT1_TX32() bfin_read32(SPORT1_TX)
+#define bfin_write_SPORT1_TX32(val) bfin_write32(SPORT1_TX, val)
+#define bfin_read_SPORT1_RX32() bfin_read32(SPORT1_RX)
+#define bfin_write_SPORT1_RX32(val) bfin_write32(SPORT1_RX, val)
+#define bfin_read_SPORT1_TX16() bfin_read16(SPORT1_TX)
+#define bfin_write_SPORT1_TX16(val) bfin_write16(SPORT1_TX, val)
+#define bfin_read_SPORT1_RX16() bfin_read16(SPORT1_RX)
+#define bfin_write_SPORT1_RX16(val) bfin_write16(SPORT1_RX, val)
#define bfin_read_SPORT1_RCR1() bfin_read16(SPORT1_RCR1)
#define bfin_write_SPORT1_RCR1(val) bfin_write16(SPORT1_RCR1, val)
#define bfin_read_SPORT1_RCR2() bfin_read16(SPORT1_RCR2)