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authorSonic Zhang <sonic.zhang@analog.com>2010-11-12 05:54:32 +0000
committerMike Frysinger <vapier@gentoo.org>2011-01-10 07:18:21 -0500
commit064cc44e62283227524c8e84ff247939728dec79 (patch)
treea870fdcb5f67c912717888462eea41393808f5de /arch/blackfin/mach-bf561
parente54b673081d12c46b47fdfe1772656cb2b43721d (diff)
Blackfin: SMP: kgdb: flush core internal write buffer before flushinv
KGDB single step in SMP kernel may hang forever in flushinv without a CSYNC ahead. This is because the core internal write buffers need to be flushed before invalidating the data cache to make sure the insn fetch is not out of sync. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf561')
-rw-r--r--arch/blackfin/mach-bf561/atomic.S5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf561/atomic.S b/arch/blackfin/mach-bf561/atomic.S
index f99f174b129f..52d6f73fcced 100644
--- a/arch/blackfin/mach-bf561/atomic.S
+++ b/arch/blackfin/mach-bf561/atomic.S
@@ -49,6 +49,7 @@ ENTRY(_get_core_lock)
jump .Lretry_corelock
.Ldone_corelock:
p0 = r1;
+ /* flush core internal write buffer before invalidate dcache */
CSYNC(r2);
flushinv[p0];
SSYNC(r2);
@@ -685,6 +686,8 @@ ENTRY(___raw_atomic_test_asm)
r1 = -L1_CACHE_BYTES;
r1 = r0 & r1;
p0 = r1;
+ /* flush core internal write buffer before invalidate dcache */
+ CSYNC(r2);
flushinv[p0];
SSYNC(r2);
r0 = [p1];
@@ -907,6 +910,8 @@ ENTRY(___raw_uncached_fetch_asm)
r1 = -L1_CACHE_BYTES;
r1 = r0 & r1;
p0 = r1;
+ /* flush core internal write buffer before invalidate dcache */
+ CSYNC(r2);
flushinv[p0];
SSYNC(r2);
r0 = [p1];