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authorManuel Lauss <manuel.lauss@gmail.com>2014-07-23 16:36:25 +0200
committerRalf Baechle <ralf@linux-mips.org>2014-07-30 13:53:52 +0200
commit9cf12167e909a86fbc4b39cf4cffef4cba40f1b3 (patch)
tree034c96710ea6f4fb1de8c47d0132c585c8013693 /arch/mips/alchemy
parent1d09de7dc76ef96a9a2c7c0244e20f12d68e6ef8 (diff)
MIPS: Alchemy: add helpers to access static memory ctrl registers.
This patch changes the static memory controller registers to offsets from base, prefixes them with AU1000_ to avoid silent failures due to changed addresses and introduces helpers to access them. No functional changes, comparing assembly of a few select functions shows no differences. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7463/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy')
-rw-r--r--arch/mips/alchemy/common/power.c48
-rw-r--r--arch/mips/alchemy/devboards/db1200.c2
-rw-r--r--arch/mips/alchemy/devboards/db1300.c2
-rw-r--r--arch/mips/alchemy/devboards/db1550.c4
4 files changed, 28 insertions, 28 deletions
diff --git a/arch/mips/alchemy/common/power.c b/arch/mips/alchemy/common/power.c
index 2d3831b02091..921ed30b440c 100644
--- a/arch/mips/alchemy/common/power.c
+++ b/arch/mips/alchemy/common/power.c
@@ -64,18 +64,18 @@ static void save_core_regs(void)
sleep_sys_pinfunc = alchemy_rdsys(AU1000_SYS_PINFUNC);
/* Save the static memory controller configuration. */
- sleep_static_memctlr[0][0] = au_readl(MEM_STCFG0);
- sleep_static_memctlr[0][1] = au_readl(MEM_STTIME0);
- sleep_static_memctlr[0][2] = au_readl(MEM_STADDR0);
- sleep_static_memctlr[1][0] = au_readl(MEM_STCFG1);
- sleep_static_memctlr[1][1] = au_readl(MEM_STTIME1);
- sleep_static_memctlr[1][2] = au_readl(MEM_STADDR1);
- sleep_static_memctlr[2][0] = au_readl(MEM_STCFG2);
- sleep_static_memctlr[2][1] = au_readl(MEM_STTIME2);
- sleep_static_memctlr[2][2] = au_readl(MEM_STADDR2);
- sleep_static_memctlr[3][0] = au_readl(MEM_STCFG3);
- sleep_static_memctlr[3][1] = au_readl(MEM_STTIME3);
- sleep_static_memctlr[3][2] = au_readl(MEM_STADDR3);
+ sleep_static_memctlr[0][0] = alchemy_rdsmem(AU1000_MEM_STCFG0);
+ sleep_static_memctlr[0][1] = alchemy_rdsmem(AU1000_MEM_STTIME0);
+ sleep_static_memctlr[0][2] = alchemy_rdsmem(AU1000_MEM_STADDR0);
+ sleep_static_memctlr[1][0] = alchemy_rdsmem(AU1000_MEM_STCFG1);
+ sleep_static_memctlr[1][1] = alchemy_rdsmem(AU1000_MEM_STTIME1);
+ sleep_static_memctlr[1][2] = alchemy_rdsmem(AU1000_MEM_STADDR1);
+ sleep_static_memctlr[2][0] = alchemy_rdsmem(AU1000_MEM_STCFG2);
+ sleep_static_memctlr[2][1] = alchemy_rdsmem(AU1000_MEM_STTIME2);
+ sleep_static_memctlr[2][2] = alchemy_rdsmem(AU1000_MEM_STADDR2);
+ sleep_static_memctlr[3][0] = alchemy_rdsmem(AU1000_MEM_STCFG3);
+ sleep_static_memctlr[3][1] = alchemy_rdsmem(AU1000_MEM_STTIME3);
+ sleep_static_memctlr[3][2] = alchemy_rdsmem(AU1000_MEM_STADDR3);
}
static void restore_core_regs(void)
@@ -95,18 +95,18 @@ static void restore_core_regs(void)
alchemy_wrsys(sleep_sys_pinfunc, AU1000_SYS_PINFUNC);
/* Restore the static memory controller configuration. */
- au_writel(sleep_static_memctlr[0][0], MEM_STCFG0);
- au_writel(sleep_static_memctlr[0][1], MEM_STTIME0);
- au_writel(sleep_static_memctlr[0][2], MEM_STADDR0);
- au_writel(sleep_static_memctlr[1][0], MEM_STCFG1);
- au_writel(sleep_static_memctlr[1][1], MEM_STTIME1);
- au_writel(sleep_static_memctlr[1][2], MEM_STADDR1);
- au_writel(sleep_static_memctlr[2][0], MEM_STCFG2);
- au_writel(sleep_static_memctlr[2][1], MEM_STTIME2);
- au_writel(sleep_static_memctlr[2][2], MEM_STADDR2);
- au_writel(sleep_static_memctlr[3][0], MEM_STCFG3);
- au_writel(sleep_static_memctlr[3][1], MEM_STTIME3);
- au_writel(sleep_static_memctlr[3][2], MEM_STADDR3);
+ alchemy_wrsmem(sleep_static_memctlr[0][0], AU1000_MEM_STCFG0);
+ alchemy_wrsmem(sleep_static_memctlr[0][1], AU1000_MEM_STTIME0);
+ alchemy_wrsmem(sleep_static_memctlr[0][2], AU1000_MEM_STADDR0);
+ alchemy_wrsmem(sleep_static_memctlr[1][0], AU1000_MEM_STCFG1);
+ alchemy_wrsmem(sleep_static_memctlr[1][1], AU1000_MEM_STTIME1);
+ alchemy_wrsmem(sleep_static_memctlr[1][2], AU1000_MEM_STADDR1);
+ alchemy_wrsmem(sleep_static_memctlr[2][0], AU1000_MEM_STCFG2);
+ alchemy_wrsmem(sleep_static_memctlr[2][1], AU1000_MEM_STTIME2);
+ alchemy_wrsmem(sleep_static_memctlr[2][2], AU1000_MEM_STADDR2);
+ alchemy_wrsmem(sleep_static_memctlr[3][0], AU1000_MEM_STCFG3);
+ alchemy_wrsmem(sleep_static_memctlr[3][1], AU1000_MEM_STTIME3);
+ alchemy_wrsmem(sleep_static_memctlr[3][2], AU1000_MEM_STADDR3);
}
void au_sleep(void)
diff --git a/arch/mips/alchemy/devboards/db1200.c b/arch/mips/alchemy/devboards/db1200.c
index 408c36f37699..5ccfd8393cd5 100644
--- a/arch/mips/alchemy/devboards/db1200.c
+++ b/arch/mips/alchemy/devboards/db1200.c
@@ -246,7 +246,7 @@ static void au1200_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
static int au1200_nand_device_ready(struct mtd_info *mtd)
{
- return __raw_readl((void __iomem *)MEM_STSTAT) & 1;
+ return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1;
}
static struct mtd_partition db1200_nand_parts[] = {
diff --git a/arch/mips/alchemy/devboards/db1300.c b/arch/mips/alchemy/devboards/db1300.c
index 1aed6be4de10..c80e5b94064e 100644
--- a/arch/mips/alchemy/devboards/db1300.c
+++ b/arch/mips/alchemy/devboards/db1300.c
@@ -169,7 +169,7 @@ static void au1300_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
static int au1300_nand_device_ready(struct mtd_info *mtd)
{
- return __raw_readl((void __iomem *)MEM_STSTAT) & 1;
+ return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1;
}
static struct mtd_partition db1300_nand_parts[] = {
diff --git a/arch/mips/alchemy/devboards/db1550.c b/arch/mips/alchemy/devboards/db1550.c
index 392fb89270d6..d1320665e7e3 100644
--- a/arch/mips/alchemy/devboards/db1550.c
+++ b/arch/mips/alchemy/devboards/db1550.c
@@ -151,7 +151,7 @@ static void au1550_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
static int au1550_nand_device_ready(struct mtd_info *mtd)
{
- return __raw_readl((void __iomem *)MEM_STSTAT) & 1;
+ return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1;
}
static struct mtd_partition db1550_nand_parts[] = {
@@ -217,7 +217,7 @@ static struct platform_device pb1550_nand_dev = {
static void __init pb1550_nand_setup(void)
{
- int boot_swapboot = (au_readl(MEM_STSTAT) & (0x7 << 1)) |
+ int boot_swapboot = (alchemy_rdsmem(AU1000_MEM_STSTAT) & (0x7 << 1)) |
((bcsr_read(BCSR_STATUS) >> 6) & 0x1);
gpio_direction_input(206); /* de-assert NAND CS# */