diff options
| author | Justin Waters <justin.waters@timesys.com> | 2008-02-26 13:07:02 -0500 |
|---|---|---|
| committer | Justin Waters <justin.waters@timesys.com> | 2008-02-26 13:07:02 -0500 |
| commit | b80a32b9cc634adfa8eaef33ec981e7febf2ade2 (patch) | |
| tree | f256bce13ba11f514a388160df84e1410bedbe2b /arch/mips/lib-32/watch.S | |
| parent | 594133ef22fae0d737bd1b57352cf3f48a192c63 (diff) | |
Update the i.MX31 Kernel to 2.6.232.6.23-mx31ads-2008022618072.6.23-mx31-200802261807
This is the result of a brute-force attempt to update the kernel to 2.6.23.
Now that we have a git tree, our effort will be a little nicer in the future.
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Diffstat (limited to 'arch/mips/lib-32/watch.S')
| -rw-r--r-- | arch/mips/lib-32/watch.S | 60 |
1 files changed, 0 insertions, 60 deletions
diff --git a/arch/mips/lib-32/watch.S b/arch/mips/lib-32/watch.S deleted file mode 100644 index 808b3af1a605..000000000000 --- a/arch/mips/lib-32/watch.S +++ /dev/null @@ -1,60 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Kernel debug stuff to use the Watch registers. - * Useful to find stack overflows, dangling pointers etc. - * - * Copyright (C) 1995, 1996, 1999 by Ralf Baechle - */ -#include <asm/asm.h> -#include <asm/mipsregs.h> -#include <asm/regdef.h> - - .set noreorder -/* - * Parameter: a0 - logic address to watch - * Currently only KSEG0 addresses are allowed! - * a1 - set bit #1 to trap on load references - * bit #0 to trap on store references - * Results : none - */ - LEAF(__watch_set) - li t0, 0x80000000 - subu a0, t0 - ori a0, 7 - xori a0, 7 - or a0, a1 - mtc0 a0, CP0_WATCHLO - sw a0, watch_savelo - - jr ra - mtc0 zero, CP0_WATCHHI - END(__watch_set) - -/* - * Parameter: none - * Results : none - */ - LEAF(__watch_clear) - jr ra - mtc0 zero, CP0_WATCHLO - END(__watch_clear) - -/* - * Parameter: none - * Results : none - */ - LEAF(__watch_reenable) - lw t0, watch_savelo - jr ra - mtc0 t0, CP0_WATCHLO - END(__watch_reenable) - -/* - * Saved value of the c0_watchlo register for watch_reenable() - */ - .data -watch_savelo: .word 0 - .text |